JPH02100327U - - Google Patents

Info

Publication number
JPH02100327U
JPH02100327U JP782889U JP782889U JPH02100327U JP H02100327 U JPH02100327 U JP H02100327U JP 782889 U JP782889 U JP 782889U JP 782889 U JP782889 U JP 782889U JP H02100327 U JPH02100327 U JP H02100327U
Authority
JP
Japan
Prior art keywords
transistor
whose
emitter
base
collector
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP782889U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP782889U priority Critical patent/JPH02100327U/ja
Publication of JPH02100327U publication Critical patent/JPH02100327U/ja
Pending legal-status Critical Current

Links

Landscapes

  • Amplifiers (AREA)

Description

【図面の簡単な説明】[Brief explanation of drawings]

第1図はこの考案の一実施例を示す回路構成図
、第2図は従来例の一例を示す回路構成図である
。 5は第1のトランジスタ、6は第2のトランジ
スタ、14は第3のトランジスタ、15は出力端
子、22は第4のトランジスタ、23は抵抗器で
ある。
FIG. 1 is a circuit diagram showing an embodiment of this invention, and FIG. 2 is a circuit diagram showing an example of a conventional example. 5 is a first transistor, 6 is a second transistor, 14 is a third transistor, 15 is an output terminal, 22 is a fourth transistor, and 23 is a resistor.

Claims (1)

【実用新案登録請求の範囲】 差動増幅器を構成する第1及び第2のトランジ
スタと、 該第2のトランジスタのコレクタにベースが接
続され、エミツタが出力端子に接続された第3の
トランジンタと、 該第3トランジスタのエミツタにコレクタが接
続されると共にベースが所定値の抵抗器を介して
接続され、エミツタが上記第2のトランジスタの
ベースに接続された第4のトランジスタと を具備して成る帰還回路。
[Claims for Utility Model Registration] First and second transistors constituting a differential amplifier; a third transistor whose base is connected to the collector of the second transistor and whose emitter is connected to the output terminal; a fourth transistor whose collector is connected to the emitter of the third transistor and whose base is connected via a resistor of a predetermined value, and whose emitter is connected to the base of the second transistor. circuit.
JP782889U 1989-01-26 1989-01-26 Pending JPH02100327U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP782889U JPH02100327U (en) 1989-01-26 1989-01-26

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP782889U JPH02100327U (en) 1989-01-26 1989-01-26

Publications (1)

Publication Number Publication Date
JPH02100327U true JPH02100327U (en) 1990-08-09

Family

ID=31213173

Family Applications (1)

Application Number Title Priority Date Filing Date
JP782889U Pending JPH02100327U (en) 1989-01-26 1989-01-26

Country Status (1)

Country Link
JP (1) JPH02100327U (en)

Similar Documents

Publication Publication Date Title
JPH02100327U (en)
JPH0358026U (en)
JPH02113424U (en)
JPS6372922U (en)
JPH0273827U (en)
JPS611930U (en) ECL circuit
JPS6442612U (en)
JPS6185929U (en)
JPS63131409U (en)
JPS6082817U (en) Muting circuit
JPH0473263U (en)
JPS61103917U (en)
JPH0320520U (en)
JPH01146620U (en)
JPH02123127U (en)
JPS6232636U (en)
JPH0290541U (en)
JPS63129314U (en)
JPS62117823U (en)
JPH0353020U (en)
JPS6275513U (en)
JPS6378416U (en)
JPS6181211U (en)
JPS63195406U (en)
JPH0163217U (en)