JPS5936610U - Muting circuit of voltage amplification circuit - Google Patents
Muting circuit of voltage amplification circuitInfo
- Publication number
- JPS5936610U JPS5936610U JP13168682U JP13168682U JPS5936610U JP S5936610 U JPS5936610 U JP S5936610U JP 13168682 U JP13168682 U JP 13168682U JP 13168682 U JP13168682 U JP 13168682U JP S5936610 U JPS5936610 U JP S5936610U
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- capacitor
- transistor
- resistor
- muting
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Amplifiers (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第1図は従来の電圧増幅回路のミューティング回路の例
を示す構成図、第2図は第1図の説明に供する線図、第
3図は本考案電圧増幅回路のミューティング回路の一実
施例を示す構成図、第4図は本考案の説明に供する線図
、第5図は本考案の他の実施例を示す構成図である。
1は音声信号入力端子、2は電圧増幅回路、3及び11
は夫々電源端子、4,13及び22は夫々コンデンサ、
5,7.14及び23は夫々抵抗器、6は電力増幅回路
、9,17.19及び20は夫々トランジスタ、16,
24a、24b及び24Cは夫々ダイオードである。Fig. 1 is a configuration diagram showing an example of a muting circuit of a conventional voltage amplification circuit, Fig. 2 is a diagram for explaining Fig. 1, and Fig. 3 is an implementation of a muting circuit of the voltage amplification circuit of the present invention. FIG. 4 is a diagram for explaining the present invention, and FIG. 5 is a diagram showing another embodiment of the present invention. 1 is an audio signal input terminal, 2 is a voltage amplification circuit, 3 and 11
are power supply terminals, 4, 13 and 22 are capacitors, respectively.
5, 7, 14 and 23 are resistors, 6 is a power amplifier circuit, 9, 17, 19 and 20 are transistors, 16,
24a, 24b and 24C are diodes, respectively.
Claims (1)
サ及び第1の抵抗器の直列回路を介して接地し、該第1
のコンデンサ及び第1の抵抗器の接続点を第1のトラン
ジスタのベースに接続すると共に上記第1のコンデンサ
及び第1の抵抗器の接続点を上記第1のコンデンサの放
電用のダイオードを介して接地し、上記第1のトランジ
スタのコレクタを上記電源端子に接続すると共に上記電
源端子を単方向素子及び第2のコンデンサの直列回路を
介して接地し、該単方向素子及び第2のコンデンサの接
続点を該第2のコンデンサと共に第2の時定数回路を構
成する第2の抵抗器を介して上記第1の下ランジスタと
は極性を異にする第2のトランジスタのエミッタに接続
すると共に該第2のトランジスタのベースを第3の抵抗
器を介して上記電源端子に接続し、上記第1のトランジ
スタのエミッタ及び上記第2のトランジスタのコレクタ
の接続点をダイオードを介して電圧増幅回路の出力側に
接続されたミューティング回路を構成するスイッチング
素子の制御電極に接続した゛ことを特徴とする電圧増幅
回路のミューティング回路。A power supply terminal is grounded via a series circuit of a first capacitor and a first resistor that constitute a first time constant circuit, and the first
A connection point between the capacitor and the first resistor is connected to the base of the first transistor, and a connection point between the first capacitor and the first resistor is connected through a diode for discharging the first capacitor. grounding, and connecting the collector of the first transistor to the power supply terminal, and also grounding the power supply terminal through a series circuit of a unidirectional element and a second capacitor, and connecting the unidirectional element and the second capacitor. The point is connected to the emitter of a second transistor having a polarity different from that of the first lower transistor through a second resistor that forms a second time constant circuit together with the second capacitor, and The base of the second transistor is connected to the power supply terminal through a third resistor, and the connection point between the emitter of the first transistor and the collector of the second transistor is connected to the output side of the voltage amplification circuit through a diode. A muting circuit for a voltage amplification circuit, characterized in that the muting circuit is connected to a control electrode of a switching element constituting the muting circuit connected to the circuit.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP13168682U JPS5936610U (en) | 1982-08-31 | 1982-08-31 | Muting circuit of voltage amplification circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP13168682U JPS5936610U (en) | 1982-08-31 | 1982-08-31 | Muting circuit of voltage amplification circuit |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS5936610U true JPS5936610U (en) | 1984-03-07 |
Family
ID=30297632
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP13168682U Pending JPS5936610U (en) | 1982-08-31 | 1982-08-31 | Muting circuit of voltage amplification circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5936610U (en) |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5762605A (en) * | 1980-10-02 | 1982-04-15 | Matsushita Electric Ind Co Ltd | Suppressing device for electric power on-and-off sound of amplifier |
JPS5734215B2 (en) * | 1979-08-14 | 1982-07-21 |
-
1982
- 1982-08-31 JP JP13168682U patent/JPS5936610U/en active Pending
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5734215B2 (en) * | 1979-08-14 | 1982-07-21 | ||
JPS5762605A (en) * | 1980-10-02 | 1982-04-15 | Matsushita Electric Ind Co Ltd | Suppressing device for electric power on-and-off sound of amplifier |
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