JPS59231920A - ＧａＡｓ論理集積回路 - Google Patents

ＧａＡｓ論理集積回路

Info

Publication number
JPS59231920A
JPS59231920A JP58105919A JP10591983A JPS59231920A JP S59231920 A JPS59231920 A JP S59231920A JP 58105919 A JP58105919 A JP 58105919A JP 10591983 A JP10591983 A JP 10591983A JP S59231920 A JPS59231920 A JP S59231920A
Authority
JP
Japan
Prior art keywords
gaas
circuit
fet
diode
logic
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP58105919A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0411050B2 (enrdf_load_stackoverflow
Inventor
Yasuo Igawa
井川　康夫
Akimichi Hojo
北條　顕道
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
National Institute of Advanced Industrial Science and Technology AIST
Original Assignee
Agency of Industrial Science and Technology
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Agency of Industrial Science and Technology filed Critical Agency of Industrial Science and Technology
Priority to JP58105919A priority Critical patent/JPS59231920A/ja
Publication of JPS59231920A publication Critical patent/JPS59231920A/ja
Publication of JPH0411050B2 publication Critical patent/JPH0411050B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/08—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices
    • H03K19/094—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors
    • H03K19/0956—Schottky diode FET logic
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/01—Modifications for accelerating switching
    • H03K19/017—Modifications for accelerating switching in field-effect transistor circuits
    • H03K19/01707—Modifications for accelerating switching in field-effect transistor circuits in asynchronous circuits
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/08—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices
    • H03K19/094—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors
    • H03K19/0944—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors using MOSFET or insulated gate field-effect transistors, i.e. IGFET
    • H03K19/09441—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors using MOSFET or insulated gate field-effect transistors, i.e. IGFET of the same canal type
    • H03K19/09443—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors using MOSFET or insulated gate field-effect transistors, i.e. IGFET of the same canal type using a combination of enhancement and depletion transistors
    • H03K19/09445—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors using MOSFET or insulated gate field-effect transistors, i.e. IGFET of the same canal type using a combination of enhancement and depletion transistors with active depletion transistors

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Power Engineering (AREA)
  • Logic Circuits (AREA)
JP58105919A 1983-06-15 1983-06-15 ＧａＡｓ論理集積回路 Granted JPS59231920A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP58105919A JPS59231920A (ja) 1983-06-15 1983-06-15 ＧａＡｓ論理集積回路

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58105919A JPS59231920A (ja) 1983-06-15 1983-06-15 ＧａＡｓ論理集積回路

Publications (2)

Publication Number Publication Date
JPS59231920A true JPS59231920A (ja) 1984-12-26
JPH0411050B2 JPH0411050B2 (enrdf_load_stackoverflow) 1992-02-27

Family

ID=14420268

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58105919A Granted JPS59231920A (ja) 1983-06-15 1983-06-15 ＧａＡｓ論理集積回路

Country Status (1)

Country Link
JP (1) JPS59231920A (enrdf_load_stackoverflow)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6471219A (en) * 1987-05-19 1989-03-16 Gazelle Microcircuits Inc Buffer circuit and integrated circuit structure
JPH01162015A (ja) * 1987-12-18 1989-06-26 Oki Electric Ind Co Ltd 電界効果トランジスタ論理回路
JP2002164772A (ja) * 2000-11-28 2002-06-07 New Japan Radio Co Ltd 半導体スイッチ集積回路

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5646340A (en) * 1979-09-22 1981-04-27 Nippon Telegr & Teleph Corp <Ntt> Logic circuit using schottky or p-n junction gate type field effect transistor

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5646340A (en) * 1979-09-22 1981-04-27 Nippon Telegr & Teleph Corp <Ntt> Logic circuit using schottky or p-n junction gate type field effect transistor

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6471219A (en) * 1987-05-19 1989-03-16 Gazelle Microcircuits Inc Buffer circuit and integrated circuit structure
JPH01162015A (ja) * 1987-12-18 1989-06-26 Oki Electric Ind Co Ltd 電界効果トランジスタ論理回路
JP2002164772A (ja) * 2000-11-28 2002-06-07 New Japan Radio Co Ltd 半導体スイッチ集積回路

Also Published As

Publication number Publication date
JPH0411050B2 (enrdf_load_stackoverflow) 1992-02-27

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