JPS59205644A - 入出力制御回路 - Google Patents
入出力制御回路Info
- Publication number
- JPS59205644A JPS59205644A JP58080351A JP8035183A JPS59205644A JP S59205644 A JPS59205644 A JP S59205644A JP 58080351 A JP58080351 A JP 58080351A JP 8035183 A JP8035183 A JP 8035183A JP S59205644 A JPS59205644 A JP S59205644A
- Authority
- JP
- Japan
- Prior art keywords
- input
- output
- data
- serial
- serial data
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 235000015115 caffè latte Nutrition 0.000 claims description 6
- 238000004891 communication Methods 0.000 claims description 2
- 238000010586 diagram Methods 0.000 description 10
- 238000000034 method Methods 0.000 description 4
- 238000006243 chemical reaction Methods 0.000 description 2
- 240000002853 Nelumbo nucifera Species 0.000 description 1
- 235000006508 Nelumbo nucifera Nutrition 0.000 description 1
- 235000006510 Nelumbo pentapetala Nutrition 0.000 description 1
- 125000004122 cyclic group Chemical group 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M9/00—Parallel/series conversion or vice versa
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Information Transfer Systems (AREA)
- Communication Control (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP58080351A JPS59205644A (ja) | 1983-05-09 | 1983-05-09 | 入出力制御回路 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP58080351A JPS59205644A (ja) | 1983-05-09 | 1983-05-09 | 入出力制御回路 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS59205644A true JPS59205644A (ja) | 1984-11-21 |
| JPH0225209B2 JPH0225209B2 (show.php) | 1990-06-01 |
Family
ID=13715827
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP58080351A Granted JPS59205644A (ja) | 1983-05-09 | 1983-05-09 | 入出力制御回路 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS59205644A (show.php) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS63183643U (show.php) * | 1987-05-15 | 1988-11-25 | ||
| JPH04174044A (ja) * | 1989-12-02 | 1992-06-22 | Motorola Inc | データ・インターフェース・システム |
-
1983
- 1983-05-09 JP JP58080351A patent/JPS59205644A/ja active Granted
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS63183643U (show.php) * | 1987-05-15 | 1988-11-25 | ||
| JPH04174044A (ja) * | 1989-12-02 | 1992-06-22 | Motorola Inc | データ・インターフェース・システム |
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0225209B2 (show.php) | 1990-06-01 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JP2770976B2 (ja) | パリティ検査装置 | |
| JPH01280843A (ja) | 状態マシンチェッカー | |
| JPH03182957A (ja) | 読み出しおよび書き込み用プロトコール | |
| CN101089838A (zh) | 一种实现i2c读写时序的方法 | |
| JPS59205644A (ja) | 入出力制御回路 | |
| CN112559264B (zh) | 基于uvm的验证平台实现fpga通用串口的仿真测试方法 | |
| JPH03266011A (ja) | フォールト・トレラント・システム及びその冗長系間の同期方法並びに多重化クロツク発振器 | |
| TW202026923A (zh) | 積體電路開發系統、積體電路開發方法以及積體電路 | |
| JPH06104875A (ja) | シリアルポート | |
| JPH0434786B2 (show.php) | ||
| JP2870101B2 (ja) | データパス診断回路 | |
| JPS612085A (ja) | アナログlsiテスタ | |
| JPH11120212A (ja) | 回路設計方法及び装置並びにそのプログラムを記録した記録媒体 | |
| JP2001177583A (ja) | 非同期シリアルデータ通信方法 | |
| JPS6072053A (ja) | 機番設定方式 | |
| JPS61169952A (ja) | メモリ1ビツトエラ−修正機能の自動確認方法 | |
| CN116248216A (zh) | 主备板时间同步方法、装置、路由器、电子设备及介质 | |
| JP2735760B2 (ja) | パターン検出回路 | |
| JPS6077251A (ja) | 誤り検出回路 | |
| JPS59181869A (ja) | 網制御装置 | |
| CN118674063A (zh) | 基于环式提高强化学习分布式训练效率的方法和装置 | |
| JPH0454532A (ja) | パリティ計算回路 | |
| JPH0548581A (ja) | パリテイ付加方式 | |
| JPS635778B2 (show.php) | ||
| JPS6074750A (ja) | 通信回線インタフェ−ス折返し方式 |