JPS59191764U - Wet multilayer ceramic substrate - Google Patents

Wet multilayer ceramic substrate

Info

Publication number
JPS59191764U
JPS59191764U JP8505883U JP8505883U JPS59191764U JP S59191764 U JPS59191764 U JP S59191764U JP 8505883 U JP8505883 U JP 8505883U JP 8505883 U JP8505883 U JP 8505883U JP S59191764 U JPS59191764 U JP S59191764U
Authority
JP
Japan
Prior art keywords
multilayer ceramic
ceramic substrate
wet multilayer
wet
ceramic board
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP8505883U
Other languages
Japanese (ja)
Inventor
茂 斉藤
品川　充久
松本　智三
元山　郁夫
浅羽　洋史
Original Assignee
株式会社日立製作所
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 株式会社日立製作所 filed Critical 株式会社日立製作所
Priority to JP8505883U priority Critical patent/JPS59191764U/en
Publication of JPS59191764U publication Critical patent/JPS59191764U/en
Pending legal-status Critical Current

Links

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of drawings]

第１図は、印刷積層により形成された湿式多層セラミッ
ク基板へ部品リード挿入後はんだ付した断面図、第２図
は、印刷積層部をセラミック基体ではさまれた湿式多層
セラミック基板へ部品リード挿入後、はんだ付した断面
図、第３図は本考案の一実施例による湿式多層セラミッ
ク基板へ部品リード挿入後、はんだ付した断面図である
。 １ａ、　　１ｂ・・・セラミック基体、２ａ〜２ｄ・・
・絶縁体層、３ａ〜３ｄ−内部導電層、３ｅｌ　〜３ｅ
３゜３ｆ、　　３ｇ・・・導’を層、４・・・ピアホー
ル、５・・・スルーホール、６・・・部品挿入穴、７・
・・オーバコート、８・・・印刷抵抗、９・・・挿入部
品のリード、１０・・・装着部品、１１・・・はんだ。Figure 1 is a cross-sectional view of soldering after inserting component leads into a wet multilayer ceramic board formed by printed lamination, and Figure 2 is a cross-sectional view after inserting component leads into a wet multilayer ceramic board sandwiched between printed laminated ceramic substrates. FIG. 3 is a cross-sectional view of soldering after inserting component leads into a wet multilayer ceramic board according to an embodiment of the present invention. 1a, 1b...Ceramic base, 2a-2d...
・Insulator layer, 3a to 3d-inner conductive layer, 3el to 3e
3゜3f, 3g... Conductive layer, 4... Pier hole, 5... Through hole, 6... Parts insertion hole, 7...
...Overcoat, 8...Printed resistor, 9...Lead of inserted part, 10...Mounted part, 11...Solder.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] セラミック基体に導体層と絶縁層とを交互に印刷する事
により形成される湿式多層セラミック基板に於いて、そ
の中間層に挿入部品用のはんだ行電極を形成した事を特
徴とする湿式多層セラミック基板。A wet multilayer ceramic board formed by alternately printing conductor layers and insulating layers on a ceramic substrate, characterized in that solder row electrodes for inserted parts are formed in the intermediate layer. .
JP8505883U 1983-06-06 1983-06-06 Wet multilayer ceramic substrate Pending JPS59191764U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP8505883U JPS59191764U (en) 1983-06-06 1983-06-06 Wet multilayer ceramic substrate

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8505883U JPS59191764U (en) 1983-06-06 1983-06-06 Wet multilayer ceramic substrate

Publications (1)

Publication Number Publication Date
JPS59191764U true JPS59191764U (en) 1984-12-19

Family

ID=30215021

Family Applications (1)

Application Number Title Priority Date Filing Date
JP8505883U Pending JPS59191764U (en) 1983-06-06 1983-06-06 Wet multilayer ceramic substrate

Country Status (1)

Country Link
JP (1) JPS59191764U (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0366U (en) * 1989-05-18 1991-01-07

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0366U (en) * 1989-05-18 1991-01-07

Similar Documents

Publication Publication Date Title
JPS59191764U (en) Wet multilayer ceramic substrate
JPS6018578U (en) Wet multilayer ceramic substrate
JPS59191765U (en) Wet multilayer ceramic substrate
JPS6018579U (en) Wet multilayer ceramic substrate
JPS5837178U (en) electronic circuit equipment
JPS5920671U (en) printed wiring board
JPS583067U (en) printed wiring board
JPS60194324U (en) multilayer chip capacitor
JPS5918459U (en) Electrical element mounting structure
JPS5834763U (en) electronic circuit equipment
JPS5939962U (en) double-sided printed wiring board
JPS58150866U (en) Chip parts mounting device
JPS6096868U (en) printed wiring board
JPS60106363U (en) printed wiring board
JPS58166067U (en) thick film multilayer circuit board
JPS619873U (en) Thick film printed multilayer substrate
JPS6115593U (en) Clock circuit structure
JPS6120074U (en) heat seal connector
JPS585376U (en) double-sided printed wiring board
JPS6057103U (en) chip resistor
JPS6018572U (en) Chip parts mounting device
JPS6054373U (en) circuit board
JPS59132666U (en) Electronic component mounting wiring board
JPS58155860U (en) Printed circuit boards for electrical equipment
JPS6092469U (en) Printed board terminal mounting structure