JPS59188232A - フエイルセイフ出力方法 - Google Patents

フエイルセイフ出力方法

Info

Publication number
JPS59188232A
JPS59188232A JP6221283A JP6221283A JPS59188232A JP S59188232 A JPS59188232 A JP S59188232A JP 6221283 A JP6221283 A JP 6221283A JP 6221283 A JP6221283 A JP 6221283A JP S59188232 A JPS59188232 A JP S59188232A
Authority
JP
Japan
Prior art keywords
output
cpu
selector
fail
safe
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP6221283A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0523087B2 (cs
Inventor
Yoji Ono
大野　陽治
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
JAPANESE NATIONAL RAILWAYS<JNR>
Japan National Railways
Nippon Kokuyu Tetsudo
Original Assignee
JAPANESE NATIONAL RAILWAYS<JNR>
Japan National Railways
Nippon Kokuyu Tetsudo
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by JAPANESE NATIONAL RAILWAYS<JNR>, Japan National Railways, Nippon Kokuyu Tetsudo filed Critical JAPANESE NATIONAL RAILWAYS<JNR>
Priority to JP6221283A priority Critical patent/JPS59188232A/ja
Publication of JPS59188232A publication Critical patent/JPS59188232A/ja
Publication of JPH0523087B2 publication Critical patent/JPH0523087B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/007—Fail-safe circuits

Landscapes

  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Electric Propulsion And Braking For Vehicles (AREA)
  • Logic Circuits (AREA)
JP6221283A 1983-04-11 1983-04-11 フエイルセイフ出力方法 Granted JPS59188232A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP6221283A JPS59188232A (ja) 1983-04-11 1983-04-11 フエイルセイフ出力方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP6221283A JPS59188232A (ja) 1983-04-11 1983-04-11 フエイルセイフ出力方法

Publications (2)

Publication Number Publication Date
JPS59188232A true JPS59188232A (ja) 1984-10-25
JPH0523087B2 JPH0523087B2 (cs) 1993-03-31

Family

ID=13193606

Family Applications (1)

Application Number Title Priority Date Filing Date
JP6221283A Granted JPS59188232A (ja) 1983-04-11 1983-04-11 フエイルセイフ出力方法

Country Status (1)

Country Link
JP (1) JPS59188232A (cs)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6194953U (cs) * 1984-11-27 1986-06-19
JPH06202895A (ja) * 1992-06-15 1994-07-22 Nippon Signal Co Ltd:The 論理演算回路

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6194953U (cs) * 1984-11-27 1986-06-19
JPH06202895A (ja) * 1992-06-15 1994-07-22 Nippon Signal Co Ltd:The 論理演算回路

Also Published As

Publication number Publication date
JPH0523087B2 (cs) 1993-03-31

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