JPS59181609A - 半導体装置の製造方法 - Google Patents

半導体装置の製造方法

Info

Publication number
JPS59181609A
JPS59181609A JP58056012A JP5601283A JPS59181609A JP S59181609 A JPS59181609 A JP S59181609A JP 58056012 A JP58056012 A JP 58056012A JP 5601283 A JP5601283 A JP 5601283A JP S59181609 A JPS59181609 A JP S59181609A
Authority
JP
Japan
Prior art keywords
film
single crystal
silicon
thermal oxide
crystallinity
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP58056012A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0136971B2 (enExample
Inventor
Takao Oota
多禾夫 太田
Toshio Yoshii
俊夫 吉井
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP58056012A priority Critical patent/JPS59181609A/ja
Publication of JPS59181609A publication Critical patent/JPS59181609A/ja
Publication of JPH0136971B2 publication Critical patent/JPH0136971B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/38—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials characterised by treatments done after the formation of the materials
    • H10P14/3822—Controlling the interface between substrate and epitaxial layer, e.g. by ion implantation followed by annealing
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/29—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials characterised by the substrates
    • H10P14/2901—Materials
    • H10P14/2921—Materials being crystalline insulating materials
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/34—Deposited materials, e.g. layers
    • H10P14/3402—Deposited materials, e.g. layers characterised by the chemical composition
    • H10P14/3404—Deposited materials, e.g. layers characterised by the chemical composition being Group IVA materials
    • H10P14/3411—Silicon, silicon germanium or germanium

Landscapes

  • Recrystallisation Techniques (AREA)
JP58056012A 1983-03-31 1983-03-31 半導体装置の製造方法 Granted JPS59181609A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP58056012A JPS59181609A (ja) 1983-03-31 1983-03-31 半導体装置の製造方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58056012A JPS59181609A (ja) 1983-03-31 1983-03-31 半導体装置の製造方法

Publications (2)

Publication Number Publication Date
JPS59181609A true JPS59181609A (ja) 1984-10-16
JPH0136971B2 JPH0136971B2 (enExample) 1989-08-03

Family

ID=13015139

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58056012A Granted JPS59181609A (ja) 1983-03-31 1983-03-31 半導体装置の製造方法

Country Status (1)

Country Link
JP (1) JPS59181609A (enExample)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63137412A (ja) * 1986-11-29 1988-06-09 Sharp Corp 半導体用基板の製造方法
WO2002004935A1 (fr) * 2000-07-06 2002-01-17 Asahi Kasei Kabushiki Kaisha Détecteur de molécules

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS54161268A (en) * 1978-06-09 1979-12-20 Hewlett Packard Yokogawa Method of manufacturing semiconductor device growing silicon layer on sapphire substrate
JPS56103425A (en) * 1980-01-21 1981-08-18 Nippon Telegr & Teleph Corp <Ntt> Improving method for semiconductor substrate

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS54161268A (en) * 1978-06-09 1979-12-20 Hewlett Packard Yokogawa Method of manufacturing semiconductor device growing silicon layer on sapphire substrate
JPS56103425A (en) * 1980-01-21 1981-08-18 Nippon Telegr & Teleph Corp <Ntt> Improving method for semiconductor substrate

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63137412A (ja) * 1986-11-29 1988-06-09 Sharp Corp 半導体用基板の製造方法
WO2002004935A1 (fr) * 2000-07-06 2002-01-17 Asahi Kasei Kabushiki Kaisha Détecteur de molécules

Also Published As

Publication number Publication date
JPH0136971B2 (enExample) 1989-08-03

Similar Documents

Publication Publication Date Title
US7442657B2 (en) Producing stress-relaxed crystalline layer on a substrate
US6703293B2 (en) Implantation at elevated temperatures for amorphization re-crystallization of Si1-xGex films on silicon substrates
JP5065676B2 (ja) 基板上に歪層を製造する方法及び層構造
JP2004014856A (ja) 半導体基板の製造方法及び半導体装置の製造方法
JP2006524426A (ja) 基板上に歪層を製造する方法と層構造
JPH10294281A (ja) 転位低減方法
CN1622294A (zh) 改善有缺陷的半导体材料质量的方法
US4693758A (en) Method of making devices in silicon, on insulator regrown by laser beam
JPS5918196A (ja) 単結晶薄膜の製造方法
JPS59181609A (ja) 半導体装置の製造方法
JPS5821818B2 (ja) 半導体単結晶膜の製造方法
JPS59228713A (ja) 半導体装置の製造方法
JP3273037B2 (ja) ヘテロ構造半導体多層薄膜の製造方法
JPS6091623A (ja) 半導体単結晶薄膜の製造方法
JPS6028223A (ja) 半導体結晶薄膜の製造方法
JPH0810669B2 (ja) Ｓｏｉ膜の形成方法
JPH0620056B2 (ja) ＣａＦ▲下２▼膜成長方法
KR20010038202A (ko) 반도체박막을 저온성장하는 방법
JPS58176930A (ja) 半導体装置の製造方法
JPS60126813A (ja) 半導体装置の製造方法
JPS63311718A (ja) ヘテロ構造単結晶半導体薄膜の製造方法
JPH03297148A (ja) 半導体装置の製造方法
JP2699347B2 (ja) 半導体基板の製造方法
JPS5893215A (ja) 半導体単結晶薄膜の製造方法
JPH05243567A (ja) Ｍｉｓ型トランジスタ素子