JPS59174024A - 半導体集積回路装置 - Google Patents

半導体集積回路装置

Info

Publication number
JPS59174024A
JPS59174024A JP58048225A JP4822583A JPS59174024A JP S59174024 A JPS59174024 A JP S59174024A JP 58048225 A JP58048225 A JP 58048225A JP 4822583 A JP4822583 A JP 4822583A JP S59174024 A JPS59174024 A JP S59174024A
Authority
JP
Japan
Prior art keywords
circuit
current
semiconductor
transistor
injector
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP58048225A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0526369B2 (enrdf_load_html_response
Inventor
Kazuo Tokuda
和夫 徳田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP58048225A priority Critical patent/JPS59174024A/ja
Publication of JPS59174024A publication Critical patent/JPS59174024A/ja
Publication of JPH0526369B2 publication Critical patent/JPH0526369B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/0175—Coupling arrangements; Interface arrangements
    • H03K19/018—Coupling arrangements; Interface arrangements using bipolar transistors only
    • H03K19/01806—Interface arrangements
    • H03K19/01818—Interface arrangements for integrated injection logic (I2L)

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Logic Circuits (AREA)
  • Physics & Mathematics (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Bipolar Integrated Circuits (AREA)
JP58048225A 1983-03-23 1983-03-23 半導体集積回路装置 Granted JPS59174024A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP58048225A JPS59174024A (ja) 1983-03-23 1983-03-23 半導体集積回路装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58048225A JPS59174024A (ja) 1983-03-23 1983-03-23 半導体集積回路装置

Publications (2)

Publication Number Publication Date
JPS59174024A true JPS59174024A (ja) 1984-10-02
JPH0526369B2 JPH0526369B2 (enrdf_load_html_response) 1993-04-15

Family

ID=12797475

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58048225A Granted JPS59174024A (ja) 1983-03-23 1983-03-23 半導体集積回路装置

Country Status (1)

Country Link
JP (1) JPS59174024A (enrdf_load_html_response)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5827436A (ja) * 1981-08-11 1983-02-18 Nec Ic Microcomput Syst Ltd 半導体回路

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5827436A (ja) * 1981-08-11 1983-02-18 Nec Ic Microcomput Syst Ltd 半導体回路

Also Published As

Publication number Publication date
JPH0526369B2 (enrdf_load_html_response) 1993-04-15

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