JPS59173867A - デイスクキヤツシユデ−タ転送制御方式 - Google Patents

デイスクキヤツシユデ−タ転送制御方式

Info

Publication number
JPS59173867A
JPS59173867A JP58047710A JP4771083A JPS59173867A JP S59173867 A JPS59173867 A JP S59173867A JP 58047710 A JP58047710 A JP 58047710A JP 4771083 A JP4771083 A JP 4771083A JP S59173867 A JPS59173867 A JP S59173867A
Authority
JP
Japan
Prior art keywords
disk
data
transfer
disk cache
data transfer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP58047710A
Other languages
English (en)
Japanese (ja)
Other versions
JPS6212546B2 (enExample
Inventor
Tetsuo Kudo
工藤　哲郎
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP58047710A priority Critical patent/JPS59173867A/ja
Publication of JPS59173867A publication Critical patent/JPS59173867A/ja
Publication of JPS6212546B2 publication Critical patent/JPS6212546B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0866—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches for peripheral storage systems, e.g. disk cache

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
  • Signal Processing For Digital Recording And Reproducing (AREA)
JP58047710A 1983-03-22 1983-03-22 デイスクキヤツシユデ−タ転送制御方式 Granted JPS59173867A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP58047710A JPS59173867A (ja) 1983-03-22 1983-03-22 デイスクキヤツシユデ−タ転送制御方式

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58047710A JPS59173867A (ja) 1983-03-22 1983-03-22 デイスクキヤツシユデ−タ転送制御方式

Publications (2)

Publication Number Publication Date
JPS59173867A true JPS59173867A (ja) 1984-10-02
JPS6212546B2 JPS6212546B2 (enExample) 1987-03-19

Family

ID=12782857

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58047710A Granted JPS59173867A (ja) 1983-03-22 1983-03-22 デイスクキヤツシユデ−タ転送制御方式

Country Status (1)

Country Link
JP (1) JPS59173867A (enExample)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04256143A (ja) * 1990-08-31 1992-09-10 Internatl Business Mach Corp <Ibm> 周辺サブシステム及び制御方法

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57164355A (en) * 1981-03-31 1982-10-08 Fujitsu Ltd Input and output interface device

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57164355A (en) * 1981-03-31 1982-10-08 Fujitsu Ltd Input and output interface device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04256143A (ja) * 1990-08-31 1992-09-10 Internatl Business Mach Corp <Ibm> 周辺サブシステム及び制御方法

Also Published As

Publication number Publication date
JPS6212546B2 (enExample) 1987-03-19

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