JPS59171152A - 半導体装置 - Google Patents
半導体装置Info
- Publication number
- JPS59171152A JPS59171152A JP58044733A JP4473383A JPS59171152A JP S59171152 A JPS59171152 A JP S59171152A JP 58044733 A JP58044733 A JP 58044733A JP 4473383 A JP4473383 A JP 4473383A JP S59171152 A JPS59171152 A JP S59171152A
- Authority
- JP
- Japan
- Prior art keywords
- terminals
- internal terminal
- internal
- branched
- tip
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/50—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor for integrated circuit devices, e.g. power bus, number of leads
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/0555—Shape
- H01L2224/05552—Shape in top view
- H01L2224/05554—Shape in top view being square
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
- H01L2224/491—Disposition
- H01L2224/4912—Layout
- H01L2224/49171—Fan-out arrangements
Landscapes
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Wire Bonding (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP58044733A JPS59171152A (ja) | 1983-03-17 | 1983-03-17 | 半導体装置 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP58044733A JPS59171152A (ja) | 1983-03-17 | 1983-03-17 | 半導体装置 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS59171152A true JPS59171152A (ja) | 1984-09-27 |
| JPH0234458B2 JPH0234458B2 (enExample) | 1990-08-03 |
Family
ID=12699642
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP58044733A Granted JPS59171152A (ja) | 1983-03-17 | 1983-03-17 | 半導体装置 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS59171152A (enExample) |
Citations (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS51138179A (en) * | 1975-05-23 | 1976-11-29 | Seiko Instr & Electronics Ltd | Semi-conductor device |
| JPS54154970A (en) * | 1978-05-26 | 1979-12-06 | Kyushu Nippon Electric | Semiconductor device |
| JPS5571030A (en) * | 1978-11-24 | 1980-05-28 | Hitachi Ltd | Mounting system for semiconductor device |
| JPS56103458A (en) * | 1980-01-21 | 1981-08-18 | Nec Corp | Hybrid ic device |
| JPS572535A (en) * | 1980-06-06 | 1982-01-07 | Hitachi Ltd | Lead structure |
| JPS57208184A (en) * | 1981-06-17 | 1982-12-21 | Hitachi Ltd | Semiconductor device |
| JPS5878448A (ja) * | 1982-10-18 | 1983-05-12 | Hitachi Ltd | 集積回路 |
| JPS593960A (ja) * | 1982-06-29 | 1984-01-10 | Toshiba Corp | 半導体装置 |
| JPS5910240A (ja) * | 1982-07-09 | 1984-01-19 | Nec Corp | 半導体装置 |
-
1983
- 1983-03-17 JP JP58044733A patent/JPS59171152A/ja active Granted
Patent Citations (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS51138179A (en) * | 1975-05-23 | 1976-11-29 | Seiko Instr & Electronics Ltd | Semi-conductor device |
| JPS54154970A (en) * | 1978-05-26 | 1979-12-06 | Kyushu Nippon Electric | Semiconductor device |
| JPS5571030A (en) * | 1978-11-24 | 1980-05-28 | Hitachi Ltd | Mounting system for semiconductor device |
| JPS56103458A (en) * | 1980-01-21 | 1981-08-18 | Nec Corp | Hybrid ic device |
| JPS572535A (en) * | 1980-06-06 | 1982-01-07 | Hitachi Ltd | Lead structure |
| JPS57208184A (en) * | 1981-06-17 | 1982-12-21 | Hitachi Ltd | Semiconductor device |
| JPS593960A (ja) * | 1982-06-29 | 1984-01-10 | Toshiba Corp | 半導体装置 |
| JPS5910240A (ja) * | 1982-07-09 | 1984-01-19 | Nec Corp | 半導体装置 |
| JPS5878448A (ja) * | 1982-10-18 | 1983-05-12 | Hitachi Ltd | 集積回路 |
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0234458B2 (enExample) | 1990-08-03 |
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