JPS59169647U - Image display terminal device - Google Patents
Image display terminal deviceInfo
- Publication number
- JPS59169647U JPS59169647U JP6190383U JP6190383U JPS59169647U JP S59169647 U JPS59169647 U JP S59169647U JP 6190383 U JP6190383 U JP 6190383U JP 6190383 U JP6190383 U JP 6190383U JP S59169647 U JPS59169647 U JP S59169647U
- Authority
- JP
- Japan
- Prior art keywords
- display data
- screen
- memories
- circuit
- display
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Digital Computer Display Output (AREA)
- Computer And Data Communications (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
図は、本考案実施例の概念的構成図である。
1・・・プロセッサ、2・・・制御回路、3・・・補助
記憶回路、4. 5・・・リフレッシュメモリ、6.7
・・・パターン発生器、訃・・ビデオ回路、9・・・表
示器。The figure is a conceptual configuration diagram of an embodiment of the present invention. 1... Processor, 2... Control circuit, 3... Auxiliary storage circuit, 4. 5...Refresh memory, 6.7
...Pattern generator, ...Video circuit, 9...Display device.
Claims (1)
ュメモリ、 これら複数のリフレッシュメモリに対応して設ケラれ、
複数のリフレッシュメモリから読み出された表示データ
がそれぞれ与えられる複数のパターン発生器、 これら複数のパターン発生器の出力が同時に与えられこ
れらの信号をビデオ信号に変換するビデオ回路、 このビデオ回路の出力信号が与えられそれに基づいて画
像を表示する表示器、 表示画面中の表示データのうち時間に依存しないデータ
を画面単位でそれぞれ記憶する補助記憶回路、 通信線によってホストコンピュータと接続され、ホスト
コンピュータから1つの画面用の表示データが通信され
たとき、そのデータを前記複数のりフリツシュメモリの
1つに書込むとともに、その画面用の時間に依存しない
表示データを前記補助゛記憶回路から読出して前記複数
のリフレッシュメモリの残りのものに書込むプロセッサ
、および このプロセッサによる統括のもとに前記複数のリフレッ
シュメモリの読出しと前記ビデオ回路の動作を制御する
制御回路を具備する画像表示端末装置。[Scope of Claim for Utility Model Registration] A plurality of refresh memories each storing a part of display data;
a plurality of pattern generators each receiving display data read from a plurality of refresh memories; a video circuit receiving the outputs of the plurality of pattern generators simultaneously and converting these signals into video signals; an output of the video circuit. A display device that displays an image based on a signal given to it, an auxiliary memory circuit that stores time-independent data among the display data on the display screen, respectively, for each screen, and is connected to a host computer by a communication line, When display data for one screen is communicated, that data is written into one of the plurality of flash memories, and time-independent display data for that screen is read from the auxiliary storage circuit and stored in the plurality of flash memories. an image display terminal device comprising: a processor for writing to the remaining refresh memories; and a control circuit for controlling reading of the plurality of refresh memories and operation of the video circuit under the control of the processor.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP6190383U JPS59169647U (en) | 1983-04-25 | 1983-04-25 | Image display terminal device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP6190383U JPS59169647U (en) | 1983-04-25 | 1983-04-25 | Image display terminal device |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS59169647U true JPS59169647U (en) | 1984-11-13 |
Family
ID=30192116
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP6190383U Pending JPS59169647U (en) | 1983-04-25 | 1983-04-25 | Image display terminal device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS59169647U (en) |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5794784A (en) * | 1980-11-20 | 1982-06-12 | Kobe Steel Ltd | Picture information synthetizing terminal |
JPS5827237A (en) * | 1981-08-11 | 1983-02-17 | Hitachi Ltd | Controlling system for display picture |
-
1983
- 1983-04-25 JP JP6190383U patent/JPS59169647U/en active Pending
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5794784A (en) * | 1980-11-20 | 1982-06-12 | Kobe Steel Ltd | Picture information synthetizing terminal |
JPS5827237A (en) * | 1981-08-11 | 1983-02-17 | Hitachi Ltd | Controlling system for display picture |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
JPS59169647U (en) | Image display terminal device | |
JPS6040171U (en) | video signal storage device | |
JPS6125653U (en) | Image information processing device | |
JP2917285B2 (en) | Image memory device | |
JPH01164562U (en) | ||
JP2845038B2 (en) | Timing control device | |
JPS58115211U (en) | medical display device | |
JPH0542756B2 (en) | ||
JPS5990995U (en) | display device | |
JPS59134842U (en) | One-chip microcontroller memory expansion device for in-vehicle electronic equipment | |
JPS62101195U (en) | ||
JPS6170243U (en) | ||
JPS58155698U (en) | memory circuit | |
JPS59113841U (en) | Main memory configuration controller | |
JPS58115210U (en) | medical display device | |
JPS6020651U (en) | Image display control device | |
JPS60176481U (en) | display control device | |
JPS60131056U (en) | Built-in memory LSI | |
JPS63149675U (en) | ||
JPS5983855U (en) | Elevator control device output device | |
JPH0432592B2 (en) | ||
JPS59132266U (en) | telephone | |
JPS6070886U (en) | display device | |
JPS59194199U (en) | magnetic bubble storage device | |
JPS59147256U (en) | handwritten character input device |