JPS5990995U - display device - Google Patents
display deviceInfo
- Publication number
- JPS5990995U JPS5990995U JP18687882U JP18687882U JPS5990995U JP S5990995 U JPS5990995 U JP S5990995U JP 18687882 U JP18687882 U JP 18687882U JP 18687882 U JP18687882 U JP 18687882U JP S5990995 U JPS5990995 U JP S5990995U
- Authority
- JP
- Japan
- Prior art keywords
- address
- memory
- display device
- information stored
- converter
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Digital Computer Display Output (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
図面は本考案の実施例構成図である。
ＣＰｔＪ、ホストコンピュータ、Ｗ：書込回路、Ｂニス
クリーンバッファＡｖＪ：書込アドレス発生部、ＡＴ：
書込アドレス変換部、Ｓ：並直変換部。The drawing is a configuration diagram of an embodiment of the present invention. CPtJ, host computer, W: write circuit, B second screen buffer AvJ: write address generator, AT:
Write address converter, S: Parallel-to-serial converter.
Claims (1)
ているパターン情報を畜える第２のメモリを有し、該第
２のメモリに畜えられたパターン情報に基いて、パター
ン表示を行う表示装置において、前記第１のメモリのア
ドレスを変換して前記第２のメモリのアドレスとするア
ドレス変換部を設け、該アドレス変換部から出力される
アドレス信号により指定されるアドレスを前記第２のメ
モリの書込アドレスとすることを特徴とする表示装置。A display device that has a second memory that stores pattern information stored in a first memory provided on the host computer side, and displays a pattern based on the pattern information stored in the second memory. An address converter is provided to convert the address of the first memory into an address of the second memory, and the address specified by the address signal output from the address converter is converted to the address of the second memory. A display device characterized by a write address.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP18687882U JPS5990995U (en) | 1982-12-10 | 1982-12-10 | display device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP18687882U JPS5990995U (en) | 1982-12-10 | 1982-12-10 | display device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS5990995U true JPS5990995U (en) | 1984-06-20 |
Family
ID=30403531
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP18687882U Pending JPS5990995U (en) | 1982-12-10 | 1982-12-10 | display device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5990995U (en) |
-
1982
- 1982-12-10 JP JP18687882U patent/JPS5990995U/en active Pending
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JPS5990995U (en) | display device | |
| JPS59113837U (en) | Graphic output device | |
| JPS61168761U (en) | ||
| JPS5865090U (en) | Character generation circuit | |
| JPS5881654U (en) | arithmetic processing unit | |
| JPS60131060U (en) | Image processing device | |
| JPS58165674U (en) | CRT display device | |
| JPS5992938U (en) | computer output device | |
| JPS59178734U (en) | text processing device | |
| JPS6116697U (en) | drawing pad device | |
| JPS6146590U (en) | image reduction device | |
| JPS58124829U (en) | CRT display device | |
| JPS58155050U (en) | electronic register | |
| JPS5828891U (en) | CRT display device | |
| JPS60187941U (en) | keyboard device | |
| JPS5917490U (en) | screen control device | |
| JPS5972050U (en) | transceiver | |
| JPS6125653U (en) | Image information processing device | |
| JPS5885234U (en) | Data display device for electronic computers | |
| JPS58126491U (en) | image display device | |
| JPS60135939U (en) | Processing device runaway detection circuit | |
| JPS6065843U (en) | Memory address expansion circuit | |
| JPS6020651U (en) | Image display control device | |
| JPS5837267U (en) | Video synthesis device | |
| JPS5990994U (en) | computer output device |