JPS5983855U - Elevator control device output device - Google Patents

Elevator control device output device

Info

Publication number
JPS5983855U
JPS5983855U JP17156183U JP17156183U JPS5983855U JP S5983855 U JPS5983855 U JP S5983855U JP 17156183 U JP17156183 U JP 17156183U JP 17156183 U JP17156183 U JP 17156183U JP S5983855 U JPS5983855 U JP S5983855U
Authority
JP
Japan
Prior art keywords
elevator control
control device
output device
electronic computer
small electronic
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP17156183U
Other languages
Japanese (ja)
Inventor
均 青木
Original Assignee
フジテック株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by フジテック株式会社 filed Critical フジテック株式会社
Priority to JP17156183U priority Critical patent/JPS5983855U/en
Publication of JPS5983855U publication Critical patent/JPS5983855U/en
Pending legal-status Critical Current

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  • Indicating And Signalling Devices For Elevators (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Abstract] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第１図は本考案の一実施例のブロック図である。 第２図は記憶装置の一実施例である。第３３．ｂ図は第
２図で示された記憶装置のタイムチャートである。第４
図は記憶装置の他の一実施例である。 第５図は第４図で示された記憶装置のタイムチャートで
ある。 １・・・小型電子計算機、２・・・記憶装置、３・・・
アドレスバス、４・・・データバス、５・・・コントロ
ールバス、６・・・並列出力信号機、７・・・出力端子
。FIG. 1 is a block diagram of an embodiment of the present invention. FIG. 2 shows an example of a storage device. 33rd. Figure b is a time chart of the storage device shown in Figure 2. Fourth
The figure shows another embodiment of the storage device. FIG. 5 is a time chart of the storage device shown in FIG. 1...Small electronic computer, 2...Storage device, 3...
Address bus, 4...Data bus, 5...Control bus, 6...Parallel output signal, 7...Output terminal.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 小型電子計算機を備えたエレベータ制御装置の出力装置
において、前記小型電子計算機から読み出し及び書き込
みができ、書き込まれた全ての記憶内容を並列に常時又
は間欠的にチルテール、インジケータ及びエレベータ制
御用信号として出力する記憶装置を備えたことを特徴と
するエレベータ制御装置の出力装置。An output device for an elevator control device equipped with a small electronic computer, which can read and write from the small electronic computer, and outputs all written memory contents in parallel, constantly or intermittently, as tilt tail, indicator, and elevator control signals. 1. An output device for an elevator control device, comprising a storage device for storing information.
JP17156183U 1983-11-04 1983-11-04 Elevator control device output device Pending JPS5983855U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP17156183U JPS5983855U (en) 1983-11-04 1983-11-04 Elevator control device output device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP17156183U JPS5983855U (en) 1983-11-04 1983-11-04 Elevator control device output device

Publications (1)

Publication Number Publication Date
JPS5983855U true JPS5983855U (en) 1984-06-06

Family

ID=30374216

Family Applications (1)

Application Number Title Priority Date Filing Date
JP17156183U Pending JPS5983855U (en) 1983-11-04 1983-11-04 Elevator control device output device

Country Status (1)

Country Link
JP (1) JPS5983855U (en)

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