JPS59194199U - magnetic bubble storage device - Google Patents

magnetic bubble storage device

Info

Publication number
JPS59194199U
JPS59194199U JP8632683U JP8632683U JPS59194199U JP S59194199 U JPS59194199 U JP S59194199U JP 8632683 U JP8632683 U JP 8632683U JP 8632683 U JP8632683 U JP 8632683U JP S59194199 U JPS59194199 U JP S59194199U
Authority
JP
Japan
Prior art keywords
magnetic bubble
storage device
circuit
bubble storage
read
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP8632683U
Other languages
Japanese (ja)
Inventor
裕 天野
Original Assignee
株式会社日立製作所
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 株式会社日立製作所 filed Critical 株式会社日立製作所
Priority to JP8632683U priority Critical patent/JPS59194199U/en
Publication of JPS59194199U publication Critical patent/JPS59194199U/en
Pending legal-status Critical Current

Links

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は、磁気バブル記憶装置のチップ構成を示す概略
図、第2図は、第1図の装置の読み書き動作を制御する
制御部の従来の番地照合回路のブロック図、第3図は、
本考案の一実施例の番地照合回路のブロック図である。 10・・・マイナアドレスレジスタ、11・・・メジャ
アドレスレジスタ、12・・・マイナアドレスレカウン
タ、13・・・マイナアドレスマッチ回路、14・・・
メジャアドレスカウンタ。
FIG. 1 is a schematic diagram showing the chip configuration of a magnetic bubble storage device, FIG. 2 is a block diagram of a conventional address verification circuit of a control section that controls read/write operations of the device in FIG. 1, and FIG.
1 is a block diagram of an address verification circuit according to an embodiment of the present invention; FIG. 10...Minor address register, 11...Major address register, 12...Minor address register counter, 13...Minor address match circuit, 14...
Major address counter.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] メジャ・マオナループ方式の磁気バブルメモリチッ処を
用い、バブルメモリの回転位置を表示するカウンタと処
理装置からの読取り及び書込み制御信号により、トラン
スファゲート回路ディテクタ回路及びジェネレート回路
を制御し、読取り書込み動作を行う磁気バブル記憶装置
において、該回転位置表示用カウンタの誤動作検出回路
とマイナループ回転位置初期設定回路を設け、該誤動作
検出回路出力により、トランスファゲート回路及びディ
アクタ回路への制御信号を抑止し、またジェネレート回
路への信号を抑止し、マイナループ回転位置初期設定回
路を起動することを特徴とする磁気バブル記憶装置。
Using a magnetic bubble memory chip with a major maonal loop method, the transfer gate circuit detector circuit and generator circuit are controlled by a counter that displays the rotational position of the bubble memory and read and write control signals from the processing unit, and read and write operations are performed. In a magnetic bubble storage device that performs A magnetic bubble storage device characterized in that a signal to a generation circuit is suppressed and a minor loop rotational position initial setting circuit is activated.
JP8632683U 1983-06-08 1983-06-08 magnetic bubble storage device Pending JPS59194199U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP8632683U JPS59194199U (en) 1983-06-08 1983-06-08 magnetic bubble storage device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8632683U JPS59194199U (en) 1983-06-08 1983-06-08 magnetic bubble storage device

Publications (1)

Publication Number Publication Date
JPS59194199U true JPS59194199U (en) 1984-12-24

Family

ID=30216264

Family Applications (1)

Application Number Title Priority Date Filing Date
JP8632683U Pending JPS59194199U (en) 1983-06-08 1983-06-08 magnetic bubble storage device

Country Status (1)

Country Link
JP (1) JPS59194199U (en)

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