JPS59154374A - 論理シミユレ−シヨンの結果記録方式 - Google Patents

論理シミユレ−シヨンの結果記録方式

Info

Publication number
JPS59154374A
JPS59154374A JP58028939A JP2893983A JPS59154374A JP S59154374 A JPS59154374 A JP S59154374A JP 58028939 A JP58028939 A JP 58028939A JP 2893983 A JP2893983 A JP 2893983A JP S59154374 A JPS59154374 A JP S59154374A
Authority
JP
Japan
Prior art keywords
signal
recorded
time
recording method
simulation result
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP58028939A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0331232B2 (enrdf_load_stackoverflow
Inventor
Nobuyuki Sato
信幸 佐藤
Yasukazu Ito
伊藤　能一
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP58028939A priority Critical patent/JPS59154374A/ja
Publication of JPS59154374A publication Critical patent/JPS59154374A/ja
Publication of JPH0331232B2 publication Critical patent/JPH0331232B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F30/00—Computer-aided design [CAD]
    • G06F30/30—Circuit design
    • G06F30/32—Circuit design at the digital level
    • G06F30/33—Design verification, e.g. functional simulation or model checking

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Evolutionary Computation (AREA)
  • Geometry (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Tests Of Electronic Circuits (AREA)
JP58028939A 1983-02-23 1983-02-23 論理シミユレ−シヨンの結果記録方式 Granted JPS59154374A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP58028939A JPS59154374A (ja) 1983-02-23 1983-02-23 論理シミユレ−シヨンの結果記録方式

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58028939A JPS59154374A (ja) 1983-02-23 1983-02-23 論理シミユレ−シヨンの結果記録方式

Publications (2)

Publication Number Publication Date
JPS59154374A true JPS59154374A (ja) 1984-09-03
JPH0331232B2 JPH0331232B2 (enrdf_load_stackoverflow) 1991-05-02

Family

ID=12262372

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58028939A Granted JPS59154374A (ja) 1983-02-23 1983-02-23 論理シミユレ−シヨンの結果記録方式

Country Status (1)

Country Link
JP (1) JPS59154374A (enrdf_load_stackoverflow)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4725975A (en) * 1982-07-13 1988-02-16 Nec Corporation Logic simulator operable on level basis and on logic block basis on each level
JPH02234068A (ja) * 1989-03-08 1990-09-17 Fujitsu Ltd 波形表示方法
JPH04120632A (ja) * 1990-09-11 1992-04-21 Nec Gumma Ltd ロジックアナライザ
WO2023031649A1 (en) * 2021-09-01 2023-03-09 Siemens Industry Software Ltd. A method and a system for enabling a user to review simulation data of an industrial environment

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
AT514997B1 (de) * 2013-10-21 2015-11-15 Gerhard Dr Kunze Modulare Absorptionskältemaschine in Plattenbauweise

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4725975A (en) * 1982-07-13 1988-02-16 Nec Corporation Logic simulator operable on level basis and on logic block basis on each level
JPH02234068A (ja) * 1989-03-08 1990-09-17 Fujitsu Ltd 波形表示方法
JPH04120632A (ja) * 1990-09-11 1992-04-21 Nec Gumma Ltd ロジックアナライザ
WO2023031649A1 (en) * 2021-09-01 2023-03-09 Siemens Industry Software Ltd. A method and a system for enabling a user to review simulation data of an industrial environment

Also Published As

Publication number Publication date
JPH0331232B2 (enrdf_load_stackoverflow) 1991-05-02

Similar Documents

Publication Publication Date Title
JP2582433B2 (ja) 編集追跡ファイルを用いたファイル編集方法
JPS59154374A (ja) 論理シミユレ−シヨンの結果記録方式
US7197445B1 (en) Atomic transaction processing for logic simulation
JPH07319927A (ja) 論理検証の網羅率測定方式
JPH03276374A (ja) 論理シミュレーシヨン結果追跡装置
JP2001202391A (ja) 論理回路のシミュレーション方法
JPS62167483A (ja) ラポラトリ−オ−トメ−シヨンシステム
JPS6278633A (ja) 負荷試験方法
JPS59148971A (ja) 論理回路シミュレ−ション方法
JPH03116245A (ja) 命令性能測定装置
JPS61283091A (ja) フアイル装置の記録デ−タアクセス方式
JP2746195B2 (ja) 汎用および編集機能付きレベル０プロセッサ
JPH02242440A (ja) 命令トレース回路
JPS62298783A (ja) オ−バライト特性測定装置
JPH0822486A (ja) 論理回路シミュレ−ション方法
JPH06259495A (ja) 論理シミュレーション方式
JPH02129734A (ja) 計算機調整不良解析方法
JPS6184746A (ja) トレ−サ・メモリ・デ−タ記録回路
JPH03250225A (ja) 論理シミュレーション環境設定方式
JPS6032216B2 (ja) デ−タ圧縮方式
Lang et al. Digital analysis of bursts in the time domain
JPH02294750A (ja) データ格納方式
JPS6177967A (ja) 論理回路シミユレ−シヨン方法
JPS62294986A (ja) 検査デ−タ作成装置
JPH0566632B2 (enrdf_load_stackoverflow)