JPH0331232B2 - - Google Patents
Info
- Publication number
- JPH0331232B2 JPH0331232B2 JP58028939A JP2893983A JPH0331232B2 JP H0331232 B2 JPH0331232 B2 JP H0331232B2 JP 58028939 A JP58028939 A JP 58028939A JP 2893983 A JP2893983 A JP 2893983A JP H0331232 B2 JPH0331232 B2 JP H0331232B2
- Authority
- JP
- Japan
- Prior art keywords
- signal
- time
- recorded
- changes
- signals
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F30/00—Computer-aided design [CAD]
- G06F30/30—Circuit design
- G06F30/32—Circuit design at the digital level
- G06F30/33—Design verification, e.g. functional simulation or model checking
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- Theoretical Computer Science (AREA)
- Evolutionary Computation (AREA)
- Geometry (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Tests Of Electronic Circuits (AREA)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP58028939A JPS59154374A (ja) | 1983-02-23 | 1983-02-23 | 論理シミユレ−シヨンの結果記録方式 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP58028939A JPS59154374A (ja) | 1983-02-23 | 1983-02-23 | 論理シミユレ−シヨンの結果記録方式 |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS59154374A JPS59154374A (ja) | 1984-09-03 |
JPH0331232B2 true JPH0331232B2 (enrdf_load_stackoverflow) | 1991-05-02 |
Family
ID=12262372
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP58028939A Granted JPS59154374A (ja) | 1983-02-23 | 1983-02-23 | 論理シミユレ−シヨンの結果記録方式 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS59154374A (enrdf_load_stackoverflow) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
AT514997A1 (de) * | 2013-10-21 | 2015-05-15 | Gerhard Dr Kunze | Modulare Absorptionskältemaschine in Plattenbauweise |
Families Citing this family (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0099114B1 (en) * | 1982-07-13 | 1988-05-11 | Nec Corporation | Logic simulator operable on level basis and on logic block basis on each level |
JPH087240B2 (ja) * | 1989-03-08 | 1996-01-29 | 富士通株式会社 | 波形表示方法 |
JPH04120632A (ja) * | 1990-09-11 | 1992-04-21 | Nec Gumma Ltd | ロジックアナライザ |
CN118043751A (zh) * | 2021-09-01 | 2024-05-14 | 西门子工业软件有限公司 | 使用户能够查看工业环境的模拟数据的方法和系统 |
-
1983
- 1983-02-23 JP JP58028939A patent/JPS59154374A/ja active Granted
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
AT514997A1 (de) * | 2013-10-21 | 2015-05-15 | Gerhard Dr Kunze | Modulare Absorptionskältemaschine in Plattenbauweise |
AT514997B1 (de) * | 2013-10-21 | 2015-11-15 | Gerhard Dr Kunze | Modulare Absorptionskältemaschine in Plattenbauweise |
Also Published As
Publication number | Publication date |
---|---|
JPS59154374A (ja) | 1984-09-03 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US4635218A (en) | Method for simulating system operation of static and dynamic circuit devices | |
US6173241B1 (en) | Logic simulator which can maintain, store, and use historical event records | |
JPS63145549A (ja) | 論理回路シミユレ−シヨン方法 | |
JPH0331232B2 (enrdf_load_stackoverflow) | ||
JP3297213B2 (ja) | 集積回路シミュレータ及び集積回路のシミュレーション方法 | |
US7197445B1 (en) | Atomic transaction processing for logic simulation | |
WO2000036532A1 (en) | Latch inference using dataflow analysis | |
JPS59148971A (ja) | 論理回路シミュレ−ション方法 | |
JP2001202391A (ja) | 論理回路のシミュレーション方法 | |
JPH0472269B2 (enrdf_load_stackoverflow) | ||
SU765881A1 (ru) | Аналоговое запоминающее устройство | |
JP2589860B2 (ja) | シミュレーション装置 | |
GB2234092A (en) | System for simulating operations of electronic circuit | |
JPS61204745A (ja) | トレ−ス回路 | |
SU1168965A1 (ru) | Устройство дл обхода узлов сеточной области | |
JPH02242440A (ja) | 命令トレース回路 | |
JPH03276374A (ja) | 論理シミュレーシヨン結果追跡装置 | |
SU1513622A1 (ru) | Преобразователь кода во временной интервал | |
JPS6017131B2 (ja) | メモリ制御回路 | |
JPH045292B2 (enrdf_load_stackoverflow) | ||
JPH03250260A (ja) | 論理シミュレーション結果出力方法 | |
SU1471223A1 (ru) | Цифровое устройство задержки | |
JPS6349853A (ja) | 論理シミユレ−シヨン処理方式 | |
JPH06259495A (ja) | 論理シミュレーション方式 | |
JPS61283091A (ja) | フアイル装置の記録デ−タアクセス方式 |