JPS59151254A - ミニコンマイコン間の割込同期方式 - Google Patents

ミニコンマイコン間の割込同期方式

Info

Publication number
JPS59151254A
JPS59151254A JP58024692A JP2469283A JPS59151254A JP S59151254 A JPS59151254 A JP S59151254A JP 58024692 A JP58024692 A JP 58024692A JP 2469283 A JP2469283 A JP 2469283A JP S59151254 A JPS59151254 A JP S59151254A
Authority
JP
Japan
Prior art keywords
terminal
microcomputer
minicomputer
interrupt
input
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP58024692A
Other languages
English (en)
Japanese (ja)
Other versions
JPH049350B2 (enrdf_load_stackoverflow
Inventor
Kosuke Osaki
大崎　浩介
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Oki Electric Industry Co Ltd
Original Assignee
Oki Electric Industry Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Oki Electric Industry Co Ltd filed Critical Oki Electric Industry Co Ltd
Priority to JP58024692A priority Critical patent/JPS59151254A/ja
Publication of JPS59151254A publication Critical patent/JPS59151254A/ja
Publication of JPH049350B2 publication Critical patent/JPH049350B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/16—Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs
    • G06F15/163—Interprocessor communication
    • G06F15/17—Interprocessor communication using an input/output type connection, e.g. channel, I/O port

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Theoretical Computer Science (AREA)
  • Software Systems (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Multi Processors (AREA)
  • Information Transfer Systems (AREA)
JP58024692A 1983-02-18 1983-02-18 ミニコンマイコン間の割込同期方式 Granted JPS59151254A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP58024692A JPS59151254A (ja) 1983-02-18 1983-02-18 ミニコンマイコン間の割込同期方式

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58024692A JPS59151254A (ja) 1983-02-18 1983-02-18 ミニコンマイコン間の割込同期方式

Publications (2)

Publication Number Publication Date
JPS59151254A true JPS59151254A (ja) 1984-08-29
JPH049350B2 JPH049350B2 (enrdf_load_stackoverflow) 1992-02-19

Family

ID=12145219

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58024692A Granted JPS59151254A (ja) 1983-02-18 1983-02-18 ミニコンマイコン間の割込同期方式

Country Status (1)

Country Link
JP (1) JPS59151254A (enrdf_load_stackoverflow)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62175857A (ja) * 1986-01-29 1987-08-01 Fuji Facom Corp マルチプロセツサシステムに於けるデ−タ授受方式

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62175857A (ja) * 1986-01-29 1987-08-01 Fuji Facom Corp マルチプロセツサシステムに於けるデ−タ授受方式

Also Published As

Publication number Publication date
JPH049350B2 (enrdf_load_stackoverflow) 1992-02-19

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