JPS59139431A - 先行読出し抑止方式 - Google Patents

先行読出し抑止方式

Info

Publication number
JPS59139431A
JPS59139431A JP952583A JP952583A JPS59139431A JP S59139431 A JPS59139431 A JP S59139431A JP 952583 A JP952583 A JP 952583A JP 952583 A JP952583 A JP 952583A JP S59139431 A JPS59139431 A JP S59139431A
Authority
JP
Japan
Prior art keywords
read
address
advance
access request
function
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP952583A
Other languages
English (en)
Japanese (ja)
Other versions
JPS6112302B2 (enrdf_load_stackoverflow
Inventor
Minekazu Maruoka
丸岡　峰和
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP952583A priority Critical patent/JPS59139431A/ja
Publication of JPS59139431A publication Critical patent/JPS59139431A/ja
Publication of JPS6112302B2 publication Critical patent/JPS6112302B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3802—Instruction prefetching

Landscapes

  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Advance Control (AREA)
JP952583A 1983-01-24 1983-01-24 先行読出し抑止方式 Granted JPS59139431A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP952583A JPS59139431A (ja) 1983-01-24 1983-01-24 先行読出し抑止方式

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP952583A JPS59139431A (ja) 1983-01-24 1983-01-24 先行読出し抑止方式

Publications (2)

Publication Number Publication Date
JPS59139431A true JPS59139431A (ja) 1984-08-10
JPS6112302B2 JPS6112302B2 (enrdf_load_stackoverflow) 1986-04-07

Family

ID=11722681

Family Applications (1)

Application Number Title Priority Date Filing Date
JP952583A Granted JPS59139431A (ja) 1983-01-24 1983-01-24 先行読出し抑止方式

Country Status (1)

Country Link
JP (1) JPS59139431A (enrdf_load_stackoverflow)

Also Published As

Publication number Publication date
JPS6112302B2 (enrdf_load_stackoverflow) 1986-04-07

Similar Documents

Publication Publication Date Title
JP3598321B2 (ja) 異なる周波数で動作するバス間でやりとりされるバッファリングデータ
US5412788A (en) Memory bank management and arbitration in multiprocessor computer system
US6591323B2 (en) Memory controller with arbitration among several strobe requests
EP1132820A2 (en) Collision detection for dual port RAM operations on a microcontroller
JPS629456A (ja) デ−タ転送装置
US6189061B1 (en) Multi-master bus system performing atomic transactions and method of operating same
JP3384770B2 (ja) コマンド・スタッキングを有する高帯域幅で狭い入出力のメモリ装置
JPS59139431A (ja) 先行読出し抑止方式
US4695947A (en) Virtual address system having fixed common bus cycles
JPS60159956A (ja) インタ−フエイス制御装置
JPS60120449A (ja) アクセス処理方式
JPS63180153A (ja) キヤツシユ記憶のラインバツク制御方式
JPH04133142A (ja) 共有メモリへの高速アクセス制御方法
JPH0450625B2 (enrdf_load_stackoverflow)
JPS6055459A (ja) プロツクデ−タ転送記憶制御方法
JPH0237592A (ja) メモリ制御装置
JPH05120206A (ja) Ｄｍａコントローラ
JP2570271B2 (ja) 半導体メモリ制御装置
JPH05108545A (ja) Ｄｍａコントローラ
JPH0351017B2 (enrdf_load_stackoverflow)
JPS6238743B2 (enrdf_load_stackoverflow)
JPS6219946A (ja) デ−タ授受方式
JPS60140451A (ja) メモリバス方式
JPH08212170A (ja) メモリ制御装置及びその方法
JPS61202266A (ja) デ−タ転送回路