JPS59138960U - register reading device - Google Patents
register reading deviceInfo
- Publication number
- JPS59138960U JPS59138960U JP14277983U JP14277983U JPS59138960U JP S59138960 U JPS59138960 U JP S59138960U JP 14277983 U JP14277983 U JP 14277983U JP 14277983 U JP14277983 U JP 14277983U JP S59138960 U JPS59138960 U JP S59138960U
- Authority
- JP
- Japan
- Prior art keywords
- register
- readout
- address information
- reading device
- address
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Landscapes
- Executing Machine-Instructions (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第1図はRX形式のマクロ命令を示す図、第2図は従来
のオペランド・アドレス生成のフロー・チャート、第3
図は本考案の1実施例のブロック図、第4図は本考案を
使用した場合におけるオペランド・アドレス生成のフロ
ー会チャートである。
1・・・アドレス指定用レジスタ、2・・・零判定回路
、3・・・アドレス情報線、4. 5. 6. 7・・
・信号線、8・・・マイクロ命令格納レジスタ、9用法
用レジスタ群、10・・・AND回路、11・・・読出
し出力線、12・・・NANDANDFigure 1 is a diagram showing an RX format macro instruction, Figure 2 is a flow chart of conventional operand address generation, and Figure 3 is a diagram showing a macro instruction in RX format.
The figure is a block diagram of one embodiment of the present invention, and FIG. 4 is a flowchart of operand address generation when the present invention is used. DESCRIPTION OF SYMBOLS 1... Address designation register, 2... Zero determination circuit, 3... Address information line, 4. 5. 6. 7...
・Signal line, 8...Micro instruction storage register, 9 Usage register group, 10...AND circuit, 11...Read output line, 12...NANDAND
Claims (2)
とを備え、該アドレス手段からのアドレス情報により指
定されたレジスタが読出されるレジスタ読出し装置にお
いて、上記アドレス情報が特定の値を有するか否かを判
定するアドレス情報判定回蕗と、命令を格納する命令格
納用レジスタと、上記レジスタの読出し出力を所定の値
に固定できる読出し出力固定手段とを設置し、且つ上記
アドレス情報が特定の値を有すると共に上記命令の特定
ビットが特定の値を有するとき、上記レジスタの読出し
出力を特定の値に固定するように構成されたことを特徴
とするレジスタ読出し装置。(1) In a register reading device that includes a group of registers and address means for addressing them, and reads out a register designated by address information from the address means, whether or not the address information has a specific value. an address information determination circuit for determining the address information, an instruction storage register for storing instructions, and readout output fixing means for fixing the readout output of the register to a predetermined value; 1. A register readout device comprising: a register readout device comprising: a register readout device comprising: a register readout device; and configured to fix a readout output of the register to a specific value when a specific bit of the instruction has a specific value.
し出力固定手段は、レジスタの読出し出力を零に固定で
きることを特徴とする実用新案登録請求の範囲第(1)
項記載のレジスタ読出し装置。(2) The address information judgment circuit is a zero judgment circuit, and the readout output fixing means is capable of fixing the readout output of the register to zero.Claim No. 1 of Utility Model Registration
Register reading device described in Section 1.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP14277983U JPS59138960U (en) | 1983-09-14 | 1983-09-14 | register reading device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP14277983U JPS59138960U (en) | 1983-09-14 | 1983-09-14 | register reading device |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS59138960U true JPS59138960U (en) | 1984-09-17 |
JPS6121694Y2 JPS6121694Y2 (en) | 1986-06-28 |
Family
ID=30318913
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP14277983U Granted JPS59138960U (en) | 1983-09-14 | 1983-09-14 | register reading device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS59138960U (en) |
-
1983
- 1983-09-14 JP JP14277983U patent/JPS59138960U/en active Granted
Also Published As
Publication number | Publication date |
---|---|
JPS6121694Y2 (en) | 1986-06-28 |
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