JPS617175U - image display device - Google Patents

image display device

Info

Publication number
JPS617175U
JPS617175U JP9212484U JP9212484U JPS617175U JP S617175 U JPS617175 U JP S617175U JP 9212484 U JP9212484 U JP 9212484U JP 9212484 U JP9212484 U JP 9212484U JP S617175 U JPS617175 U JP S617175U
Authority
JP
Japan
Prior art keywords
image
display device
image display
main control
control circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP9212484U
Other languages
Japanese (ja)
Other versions
JPH0215425Y2 (en
Inventor
元明 浅尾
Original Assignee
三洋電機株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 三洋電機株式会社 filed Critical 三洋電機株式会社
Priority to JP9212484U priority Critical patent/JPS617175U/en
Publication of JPS617175U publication Critical patent/JPS617175U/en
Application granted granted Critical
Publication of JPH0215425Y2 publication Critical patent/JPH0215425Y2/ja
Granted legal-status Critical Current

Links

Landscapes

  • Television Systems (AREA)
  • Facsimile Image Signal Circuits (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of drawings]

第１図は本考案の画像表示装置のブロック図、第２図は
従来の画像表示装置のブロック図である。 １・・−ＣＰＵ （主制御回路）、４・・・画像メモリ
、１１・・・第１レジスタ、１２・・・第２レジスタ、
Ｂ・・・ＣＰＵアドレスバス、Ａ・・・表示アドレスバ
ス、Ｃ・・・ＣＰＵデータパス、Ｄ・・・ＶＲＡＭアド
レスバス、Ｅ・・・ＶＲＡＭデータパス。FIG. 1 is a block diagram of an image display device of the present invention, and FIG. 2 is a block diagram of a conventional image display device. 1...-CPU (main control circuit), 4... Image memory, 11... First register, 12... Second register,
B...CPU address bus, A...Display address bus, C...CPU data path, D...VRAM address bus, E...VRAM data path.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 主制御回路と画像メモリ間に、前記主制御回路からのア
ドレス情報を前記画像メモリに転送するためのアドレス
バスと、前記主制御回路力ζらの画像情報を前記画像メ
モリに転送するためのデータパスを備えるとともに前記
画像メモリに書込まれた画像情報を順次読出して表示す
るようにした画像表示装置において、前記アドレスバス
にアドレス情報を保持する第１レジスタを設けるととも
に前記データパスに画像情報を保持する第２レジスタを
設け、前記主制御回路の前記画像メモリへの書込みを、
前記第１、第２レジスタを介して行なうようにした画像
表示装置。An address bus for transferring address information from the main control circuit to the image memory and data for transferring image information from the main control circuit to the image memory are provided between the main control circuit and the image memory. In the image display device, the image display device includes a path and sequentially reads and displays image information written in the image memory, wherein the address bus is provided with a first register for holding address information, and the image information is transmitted to the data path. A second register is provided to hold the main control circuit's writing to the image memory.
An image display device in which the image display is performed via the first and second registers.
JP9212484U 1984-06-20 1984-06-20 image display device Granted JPS617175U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP9212484U JPS617175U (en) 1984-06-20 1984-06-20 image display device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9212484U JPS617175U (en) 1984-06-20 1984-06-20 image display device

Publications (2)

Publication Number Publication Date
JPS617175U true JPS617175U (en) 1986-01-17
JPH0215425Y2 JPH0215425Y2 (en) 1990-04-25

Family

ID=30648634

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9212484U Granted JPS617175U (en) 1984-06-20 1984-06-20 image display device

Country Status (1)

Country Link
JP (1) JPS617175U (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3713040A (en) * 1971-12-23 1973-01-23 Hewlett Packard Co Signal frequency controller

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5987569A (en) * 1982-11-11 1984-05-21 Toshiba Corp Automatic continuous processing circuit of data

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5987569A (en) * 1982-11-11 1984-05-21 Toshiba Corp Automatic continuous processing circuit of data

Also Published As

Publication number Publication date
JPH0215425Y2 (en) 1990-04-25

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