JPS5912652A - ビタ−ビ復号器の同期回路 - Google Patents

ビタ−ビ復号器の同期回路

Info

Publication number
JPS5912652A
JPS5912652A JP57120946A JP12094682A JPS5912652A JP S5912652 A JPS5912652 A JP S5912652A JP 57120946 A JP57120946 A JP 57120946A JP 12094682 A JP12094682 A JP 12094682A JP S5912652 A JPS5912652 A JP S5912652A
Authority
JP
Japan
Prior art keywords
signal
phase
terminal
output
viterbi decoder
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP57120946A
Other languages
English (en)
Japanese (ja)
Other versions
JPH038142B2 (enrdf_load_stackoverflow
Inventor
Yutaka Yasuda
豊 安田
Yasuo Hirata
康夫 平田
Katsuhiro Nakamura
勝洋 中村
Yukitsuna Furuya
之綱 古谷
Shuji Murakami
修司 村上
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
KDDI Corp
Original Assignee
Kokusai Denshin Denwa KK
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Kokusai Denshin Denwa KK, NEC Corp, Nippon Electric Co Ltd filed Critical Kokusai Denshin Denwa KK
Priority to JP57120946A priority Critical patent/JPS5912652A/ja
Priority to US06/511,774 priority patent/US4527279A/en
Priority to GB08318596A priority patent/GB2123655B/en
Priority to FR838311533A priority patent/FR2530095B1/fr
Publication of JPS5912652A publication Critical patent/JPS5912652A/ja
Publication of JPH038142B2 publication Critical patent/JPH038142B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/33—Synchronisation based on error coding or decoding

Landscapes

  • Physics & Mathematics (AREA)
  • Probability & Statistics with Applications (AREA)
  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Error Detection And Correction (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
JP57120946A 1982-07-12 1982-07-12 ビタ−ビ復号器の同期回路 Granted JPS5912652A (ja)

Priority Applications (4)

Application Number Priority Date Filing Date Title
JP57120946A JPS5912652A (ja) 1982-07-12 1982-07-12 ビタ−ビ復号器の同期回路
US06/511,774 US4527279A (en) 1982-07-12 1983-07-06 Synchronization circuit for a Viterbi decoder
GB08318596A GB2123655B (en) 1982-07-12 1983-07-08 Synchronization circuit for a viterbi decoder
FR838311533A FR2530095B1 (fr) 1982-07-12 1983-07-11 Circuit de synchronisation pour decodeur viterbi

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP57120946A JPS5912652A (ja) 1982-07-12 1982-07-12 ビタ−ビ復号器の同期回路

Publications (2)

Publication Number Publication Date
JPS5912652A true JPS5912652A (ja) 1984-01-23
JPH038142B2 JPH038142B2 (enrdf_load_stackoverflow) 1991-02-05

Family

ID=14798879

Family Applications (1)

Application Number Title Priority Date Filing Date
JP57120946A Granted JPS5912652A (ja) 1982-07-12 1982-07-12 ビタ−ビ復号器の同期回路

Country Status (1)

Country Link
JP (1) JPS5912652A (enrdf_load_stackoverflow)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2961457B1 (fr) 2010-06-21 2013-04-26 Valeo Systemes Dessuyage Balai d'essuie-glace a dispositif d'aspersion integre

Also Published As

Publication number Publication date
JPH038142B2 (enrdf_load_stackoverflow) 1991-02-05

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