JPH0160977B2 - - Google Patents
Info
- Publication number
- JPH0160977B2 JPH0160977B2 JP57120942A JP12094282A JPH0160977B2 JP H0160977 B2 JPH0160977 B2 JP H0160977B2 JP 57120942 A JP57120942 A JP 57120942A JP 12094282 A JP12094282 A JP 12094282A JP H0160977 B2 JPH0160977 B2 JP H0160977B2
- Authority
- JP
- Japan
- Prior art keywords
- phase
- signal
- terminal
- output
- metric
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/33—Synchronisation based on error coding or decoding
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L7/00—Arrangements for synchronising receiver with transmitter
- H04L7/0054—Detection of the synchronisation error by features other than the received signal transition
- H04L7/0062—Detection of the synchronisation error by features other than the received signal transition detection of error based on data decision error, e.g. Mueller type detection
Landscapes
- Physics & Mathematics (AREA)
- Probability & Statistics with Applications (AREA)
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Error Detection And Correction (AREA)
- Synchronisation In Digital Transmission Systems (AREA)
Priority Applications (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP57120942A JPS5912648A (ja) | 1982-07-12 | 1982-07-12 | ビタ−ビ復号器の同期回路 |
US06/511,503 US4578800A (en) | 1982-07-12 | 1983-07-06 | Synchronization circuit for a Viterbi decoder |
GB08318595A GB2123654B (en) | 1982-07-12 | 1983-07-08 | Synchronization circuit for a viterbi decoder |
FR838311534A FR2530096B1 (fr) | 1982-07-12 | 1983-07-11 | Circuit de synchronisation pour decodeur viterbi |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP57120942A JPS5912648A (ja) | 1982-07-12 | 1982-07-12 | ビタ−ビ復号器の同期回路 |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS5912648A JPS5912648A (ja) | 1984-01-23 |
JPH0160977B2 true JPH0160977B2 (enrdf_load_stackoverflow) | 1989-12-26 |
Family
ID=14798778
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP57120942A Granted JPS5912648A (ja) | 1982-07-12 | 1982-07-12 | ビタ−ビ復号器の同期回路 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5912648A (enrdf_load_stackoverflow) |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS62213322A (ja) * | 1986-03-13 | 1987-09-19 | Nec Corp | ビタビ復号器を有する受信機の動作状態監視方法 |
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1982
- 1982-07-12 JP JP57120942A patent/JPS5912648A/ja active Granted
Also Published As
Publication number | Publication date |
---|---|
JPS5912648A (ja) | 1984-01-23 |