JPH0312505B2 - - Google Patents

Info

Publication number
JPH0312505B2
JPH0312505B2 JP57120944A JP12094482A JPH0312505B2 JP H0312505 B2 JPH0312505 B2 JP H0312505B2 JP 57120944 A JP57120944 A JP 57120944A JP 12094482 A JP12094482 A JP 12094482A JP H0312505 B2 JPH0312505 B2 JP H0312505B2
Authority
JP
Japan
Prior art keywords
terminal
circuit
metric
output
signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP57120944A
Other languages
English (en)
Japanese (ja)
Other versions
JPS5912650A (ja
Inventor
Yutaka Yasuda
Yasuo Hirata
Katsuhiro Nakamura
Yukitsuna Furuya
Shuji Murakami
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
KDDI Corp
Original Assignee
Kokusai Denshin Denwa KK
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Kokusai Denshin Denwa KK, Nippon Electric Co Ltd filed Critical Kokusai Denshin Denwa KK
Priority to JP57120944A priority Critical patent/JPS5912650A/ja
Priority to US06/511,774 priority patent/US4527279A/en
Priority to GB08318596A priority patent/GB2123655B/en
Priority to FR838311533A priority patent/FR2530095B1/fr
Publication of JPS5912650A publication Critical patent/JPS5912650A/ja
Publication of JPH0312505B2 publication Critical patent/JPH0312505B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/33—Synchronisation based on error coding or decoding

Landscapes

  • Physics & Mathematics (AREA)
  • Probability & Statistics with Applications (AREA)
  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
  • Error Detection And Correction (AREA)
JP57120944A 1982-07-12 1982-07-12 ビタ−ビ復号器の同期回路 Granted JPS5912650A (ja)

Priority Applications (4)

Application Number Priority Date Filing Date Title
JP57120944A JPS5912650A (ja) 1982-07-12 1982-07-12 ビタ−ビ復号器の同期回路
US06/511,774 US4527279A (en) 1982-07-12 1983-07-06 Synchronization circuit for a Viterbi decoder
GB08318596A GB2123655B (en) 1982-07-12 1983-07-08 Synchronization circuit for a viterbi decoder
FR838311533A FR2530095B1 (fr) 1982-07-12 1983-07-11 Circuit de synchronisation pour decodeur viterbi

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP57120944A JPS5912650A (ja) 1982-07-12 1982-07-12 ビタ−ビ復号器の同期回路

Publications (2)

Publication Number Publication Date
JPS5912650A JPS5912650A (ja) 1984-01-23
JPH0312505B2 true JPH0312505B2 (enrdf_load_stackoverflow) 1991-02-20

Family

ID=14798828

Family Applications (1)

Application Number Title Priority Date Filing Date
JP57120944A Granted JPS5912650A (ja) 1982-07-12 1982-07-12 ビタ−ビ復号器の同期回路

Country Status (1)

Country Link
JP (1) JPS5912650A (enrdf_load_stackoverflow)

Also Published As

Publication number Publication date
JPS5912650A (ja) 1984-01-23

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