JPS59125192A - 分散制御型電子交換機におけるクロツク供給回路 - Google Patents
分散制御型電子交換機におけるクロツク供給回路Info
- Publication number
- JPS59125192A JPS59125192A JP11783A JP11783A JPS59125192A JP S59125192 A JPS59125192 A JP S59125192A JP 11783 A JP11783 A JP 11783A JP 11783 A JP11783 A JP 11783A JP S59125192 A JPS59125192 A JP S59125192A
- Authority
- JP
- Japan
- Prior art keywords
- clock
- circuit
- processor
- source
- output
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 230000010355 oscillation Effects 0.000 claims description 15
- 230000001360 synchronised effect Effects 0.000 claims description 6
- 238000010586 diagram Methods 0.000 description 6
- 230000000694 effects Effects 0.000 description 2
- WABPQHHGFIMREM-AHCXROLUSA-N lead-203 Chemical compound [203Pb] WABPQHHGFIMREM-AHCXROLUSA-N 0.000 description 2
- 238000009412 basement excavation Methods 0.000 description 1
- 125000004122 cyclic group Chemical group 0.000 description 1
- 238000000034 method Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04Q—SELECTING
- H04Q3/00—Selecting arrangements
- H04Q3/42—Circuit arrangements for indirect selecting controlled by common circuits, e.g. register controller, marker
- H04Q3/54—Circuit arrangements for indirect selecting controlled by common circuits, e.g. register controller, marker in which the logic circuitry controlling the exchange is centralised
- H04Q3/545—Circuit arrangements for indirect selecting controlled by common circuits, e.g. register controller, marker in which the logic circuitry controlling the exchange is centralised using a stored programme
Landscapes
- Engineering & Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Exchange Systems With Centralized Control (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP11783A JPS59125192A (ja) | 1983-01-04 | 1983-01-04 | 分散制御型電子交換機におけるクロツク供給回路 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP11783A JPS59125192A (ja) | 1983-01-04 | 1983-01-04 | 分散制御型電子交換機におけるクロツク供給回路 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS59125192A true JPS59125192A (ja) | 1984-07-19 |
| JPH0145800B2 JPH0145800B2 (cs) | 1989-10-04 |
Family
ID=11465101
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP11783A Granted JPS59125192A (ja) | 1983-01-04 | 1983-01-04 | 分散制御型電子交換機におけるクロツク供給回路 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS59125192A (cs) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH02128232A (ja) * | 1988-10-25 | 1990-05-16 | Internatl Business Mach Corp <Ibm> | フオールト・トレラント同期システム |
| JPH0659769A (ja) * | 1992-06-26 | 1994-03-04 | Internatl Business Mach Corp <Ibm> | ディジタルコンピュータのクロック生成回路および方法 |
-
1983
- 1983-01-04 JP JP11783A patent/JPS59125192A/ja active Granted
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH02128232A (ja) * | 1988-10-25 | 1990-05-16 | Internatl Business Mach Corp <Ibm> | フオールト・トレラント同期システム |
| JPH0659769A (ja) * | 1992-06-26 | 1994-03-04 | Internatl Business Mach Corp <Ibm> | ディジタルコンピュータのクロック生成回路および方法 |
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0145800B2 (cs) | 1989-10-04 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US5291528A (en) | Circuit for glitch-free switching of asynchronous clock sources | |
| RU2020572C1 (ru) | Компьютерная система | |
| JPH04113718A (ja) | ヒットレス・クロック切替装置 | |
| US5691660A (en) | Clock synchronization scheme for fractional multiplication systems | |
| KR0138220B1 (ko) | 위상동기루프회로의 클럭지연보상 및 듀티제어 장치 | |
| CN100438361C (zh) | 对同步数字体系设备主备时钟相位进行控制的方法 | |
| US5742799A (en) | Method and apparatus for synchronizing multiple clocks | |
| US5881113A (en) | Redundancy clock supply module for exchange system | |
| KR100245077B1 (ko) | 반도체 메모리 소자의 딜레이 루프 럭크 회로 | |
| US5045715A (en) | Circuit for generating stretched clock phases on a cycle by cycle basis | |
| JPS59125192A (ja) | 分散制御型電子交換機におけるクロツク供給回路 | |
| JP2704102B2 (ja) | クロック同期方式 | |
| JP2978884B1 (ja) | クロック交絡分配装置 | |
| JPS5827527B2 (ja) | クロック回路 | |
| JP2918943B2 (ja) | 位相同期回路 | |
| JP2972463B2 (ja) | 同期信号供給装置 | |
| JPH0630035B2 (ja) | クロック同期型システムにおけるクロック切替え制御方式 | |
| JPS62169560A (ja) | 二重化クロツク信号発生装置 | |
| JP3062179B1 (ja) | 冗長系クロック位相調整回路 | |
| JPH1056362A (ja) | ディジタル信号処理集積回路 | |
| JP2003198430A (ja) | クロック発生装置 | |
| JP3000360U (ja) | 通信機器用基準信号生成回路 | |
| KR100328761B1 (ko) | 광통신 시스템의 시스템 클럭 유니트 스위칭 장치 | |
| KR19980013886A (ko) | 클럭 발생장치 | |
| JPH11298460A (ja) | クロック切替回路 |