JPS59117160U - 絶縁物封止半導体装置 - Google Patents

絶縁物封止半導体装置

Info

Publication number
JPS59117160U
JPS59117160U JP1066383U JP1066383U JPS59117160U JP S59117160 U JPS59117160 U JP S59117160U JP 1066383 U JP1066383 U JP 1066383U JP 1066383 U JP1066383 U JP 1066383U JP S59117160 U JPS59117160 U JP S59117160U
Authority
JP
Japan
Prior art keywords
heat sink
insulator
sealed
semiconductor element
semiconductor device
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP1066383U
Other languages
English (en)
Japanese (ja)
Other versions
JPS6322677Y2 (enrdf_load_stackoverflow
Inventor
都外川 峯秀
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sanken Electric Co Ltd
Original Assignee
Sanken Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sanken Electric Co Ltd filed Critical Sanken Electric Co Ltd
Priority to JP1066383U priority Critical patent/JPS59117160U/ja
Publication of JPS59117160U publication Critical patent/JPS59117160U/ja
Application granted granted Critical
Publication of JPS6322677Y2 publication Critical patent/JPS6322677Y2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491Disposition
    • H01L2224/4912Layout
    • H01L2224/49171Fan-out arrangements

Landscapes

  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
JP1066383U 1983-01-28 1983-01-28 絶縁物封止半導体装置 Granted JPS59117160U (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1066383U JPS59117160U (ja) 1983-01-28 1983-01-28 絶縁物封止半導体装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1066383U JPS59117160U (ja) 1983-01-28 1983-01-28 絶縁物封止半導体装置

Publications (2)

Publication Number Publication Date
JPS59117160U true JPS59117160U (ja) 1984-08-07
JPS6322677Y2 JPS6322677Y2 (enrdf_load_stackoverflow) 1988-06-22

Family

ID=30142101

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1066383U Granted JPS59117160U (ja) 1983-01-28 1983-01-28 絶縁物封止半導体装置

Country Status (1)

Country Link
JP (1) JPS59117160U (enrdf_load_stackoverflow)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2023021938A1 (ja) * 2021-08-18 2023-02-23 ローム株式会社 半導体装置
WO2024095788A1 (ja) * 2022-11-04 2024-05-10 ローム株式会社 半導体装置
JP2025505247A (ja) * 2022-02-11 2025-02-21 ウルフスピード インコーポレイテッド クリープ延伸構造体を有する半導体パッケージ

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2023021938A1 (ja) * 2021-08-18 2023-02-23 ローム株式会社 半導体装置
JP2025505247A (ja) * 2022-02-11 2025-02-21 ウルフスピード インコーポレイテッド クリープ延伸構造体を有する半導体パッケージ
WO2024095788A1 (ja) * 2022-11-04 2024-05-10 ローム株式会社 半導体装置

Also Published As

Publication number Publication date
JPS6322677Y2 (enrdf_load_stackoverflow) 1988-06-22

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