JPS59112954U - 絶縁物封止半導体装置 - Google Patents

絶縁物封止半導体装置

Info

Publication number
JPS59112954U
JPS59112954U JP678983U JP678983U JPS59112954U JP S59112954 U JPS59112954 U JP S59112954U JP 678983 U JP678983 U JP 678983U JP 678983 U JP678983 U JP 678983U JP S59112954 U JPS59112954 U JP S59112954U
Authority
JP
Japan
Prior art keywords
insulator
wide
external lead
semiconductor device
external
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP678983U
Other languages
English (en)
Japanese (ja)
Other versions
JPH0414939Y2 (en:Method
Inventor
都外川　「峰」秀
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sanken Electric Co Ltd
Original Assignee
Sanken Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sanken Electric Co Ltd filed Critical Sanken Electric Co Ltd
Priority to JP678983U priority Critical patent/JPS59112954U/ja
Publication of JPS59112954U publication Critical patent/JPS59112954U/ja
Application granted granted Critical
Publication of JPH0414939Y2 publication Critical patent/JPH0414939Y2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491—Disposition
    • H01L2224/4912—Layout
    • H01L2224/49171—Fan-out arrangements

Landscapes

  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
JP678983U 1983-01-21 1983-01-21 絶縁物封止半導体装置 Granted JPS59112954U (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP678983U JPS59112954U (ja) 1983-01-21 1983-01-21 絶縁物封止半導体装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP678983U JPS59112954U (ja) 1983-01-21 1983-01-21 絶縁物封止半導体装置

Publications (2)

Publication Number Publication Date
JPS59112954U true JPS59112954U (ja) 1984-07-30
JPH0414939Y2 JPH0414939Y2 (en:Method) 1992-04-03

Family

ID=30138329

Family Applications (1)

Application Number Title Priority Date Filing Date
JP678983U Granted JPS59112954U (ja) 1983-01-21 1983-01-21 絶縁物封止半導体装置

Country Status (1)

Country Link
JP (1) JPS59112954U (en:Method)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6457654U (en:Method) * 1987-10-05 1989-04-10

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS53112275U (en:Method) * 1977-02-10 1978-09-07
JPS5584957U (en:Method) * 1978-12-04 1980-06-11

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS53112275U (en:Method) * 1977-02-10 1978-09-07
JPS5584957U (en:Method) * 1978-12-04 1980-06-11

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6457654U (en:Method) * 1987-10-05 1989-04-10

Also Published As

Publication number Publication date
JPH0414939Y2 (en:Method) 1992-04-03

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