JPS59100559A - 半導体装置 - Google Patents

半導体装置

Info

Publication number
JPS59100559A
JPS59100559A JP21160682A JP21160682A JPS59100559A JP S59100559 A JPS59100559 A JP S59100559A JP 21160682 A JP21160682 A JP 21160682A JP 21160682 A JP21160682 A JP 21160682A JP S59100559 A JPS59100559 A JP S59100559A
Authority
JP
Japan
Prior art keywords
insulating film
film
semiconductor device
layer
electrode outlet
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP21160682A
Other languages
English (en)
Japanese (ja)
Other versions
JPH038583B2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html
Inventor
Ryuichi Matsuo
龍一 松尾
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP21160682A priority Critical patent/JPS59100559A/ja
Publication of JPS59100559A publication Critical patent/JPS59100559A/ja
Publication of JPH038583B2 publication Critical patent/JPH038583B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/02—Bonding areas ; Manufacturing methods related thereto
    • H01L24/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L24/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3157—Partial encapsulation or coating
    • H01L23/3171—Partial encapsulation or coating the coating being directly applied to the semiconductor body, e.g. passivation layer
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/0212—Auxiliary members for bonding areas, e.g. spacers
    • H01L2224/02122—Auxiliary members for bonding areas, e.g. spacers being formed on the semiconductor or solid-state body
    • H01L2224/02163—Auxiliary members for bonding areas, e.g. spacers being formed on the semiconductor or solid-state body on the bonding area
    • H01L2224/02165—Reinforcing structures
    • H01L2224/02166—Collar structures
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/05001—Internal layers
    • H01L2224/05073—Single internal layer
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554—External layer
    • H01L2224/0555—Shape
    • H01L2224/05556—Shape in side view
    • H01L2224/05558—Shape in side view conformal layer on a patterned surface
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01014—Silicon [Si]

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Non-Volatile Memory (AREA)
  • Local Oxidation Of Silicon (AREA)
  • Wire Bonding (AREA)
JP21160682A 1982-11-30 1982-11-30 半導体装置 Granted JPS59100559A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP21160682A JPS59100559A (ja) 1982-11-30 1982-11-30 半導体装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP21160682A JPS59100559A (ja) 1982-11-30 1982-11-30 半導体装置

Publications (2)

Publication Number Publication Date
JPS59100559A true JPS59100559A (ja) 1984-06-09
JPH038583B2 JPH038583B2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) 1991-02-06

Family

ID=16608544

Family Applications (1)

Application Number Title Priority Date Filing Date
JP21160682A Granted JPS59100559A (ja) 1982-11-30 1982-11-30 半導体装置

Country Status (1)

Country Link
JP (1) JPS59100559A (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5070386A (en) * 1989-08-09 1991-12-03 Seiko Instruments Inc. Passivation layer structure with through-holes for semiconductor device
JP2006351767A (ja) * 2005-06-15 2006-12-28 Sanyo Electric Co Ltd 半導体装置及びその製造方法

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57180138A (en) * 1981-04-30 1982-11-06 Nec Corp Semiconductor device
JPS57202749A (en) * 1981-06-08 1982-12-11 Toshiba Corp Semiconductor device
JPS58219741A (ja) * 1982-06-15 1983-12-21 Nippon Gakki Seizo Kk 半導体装置

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57180138A (en) * 1981-04-30 1982-11-06 Nec Corp Semiconductor device
JPS57202749A (en) * 1981-06-08 1982-12-11 Toshiba Corp Semiconductor device
JPS58219741A (ja) * 1982-06-15 1983-12-21 Nippon Gakki Seizo Kk 半導体装置

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5070386A (en) * 1989-08-09 1991-12-03 Seiko Instruments Inc. Passivation layer structure with through-holes for semiconductor device
JP2006351767A (ja) * 2005-06-15 2006-12-28 Sanyo Electric Co Ltd 半導体装置及びその製造方法

Also Published As

Publication number Publication date
JPH038583B2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) 1991-02-06

Similar Documents

Publication Publication Date Title
CA1242532A (en) Input protection arrangement for vlsi intergrated circuit devices
US4628590A (en) Method of manufacture of a semiconductor device
US4472730A (en) Semiconductor device having an improved moisture resistance
US5661082A (en) Process for forming a semiconductor device having a bond pad
US4005455A (en) Corrosive resistant semiconductor interconnect pad
US6133625A (en) Semiconductor device and method for manufacturing the same
JPH11261010A5 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)
JPS59100559A (ja) 半導体装置
US7560800B1 (en) Die seal with reduced noise coupling
JP2748938B2 (ja) 半導体集積回路装置
JPH0474858B2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)
US6787432B2 (en) Semiconductor device
JPH01130545A (ja) 樹脂封止型半導体装置
JPS6020548A (ja) 集積回路における入力保護装置
KR100575861B1 (ko) 반도체 소자의 정전기 방지 구조
JPH0324056B2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)
KR960013633B1 (ko) 반도체 집적회로의 쉴딩 방법
KR100241539B1 (ko) 반도체 소자의 게이트 전극 형성방법
JPS60167467A (ja) 半導体装置
JP2002094008A (ja) 半導体装置とその製造方法
KR100290788B1 (ko) 반도체 소자의 정전기 방지 구조
JPH02164061A (ja) 半導体装置
JPH04145658A (ja) 半導体集積回路
JPS6237822B2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)
JP2996346B2 (ja) Ｍｏｓ集積回路