JPS5894240A - クロツクパルス発生回路 - Google Patents

クロツクパルス発生回路

Info

Publication number
JPS5894240A
JPS5894240A JP56192619A JP19261981A JPS5894240A JP S5894240 A JPS5894240 A JP S5894240A JP 56192619 A JP56192619 A JP 56192619A JP 19261981 A JP19261981 A JP 19261981A JP S5894240 A JPS5894240 A JP S5894240A
Authority
JP
Japan
Prior art keywords
signal
circuit
output
clock pulse
differential
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP56192619A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0156574B2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html
Inventor
Kazuyoshi Tanaka
田中　和佳
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Home Electronics Ltd
NEC Corp
Original Assignee
NEC Home Electronics Ltd
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Home Electronics Ltd, Nippon Electric Co Ltd filed Critical NEC Home Electronics Ltd
Priority to JP56192619A priority Critical patent/JPS5894240A/ja
Publication of JPS5894240A publication Critical patent/JPS5894240A/ja
Publication of JPH0156574B2 publication Critical patent/JPH0156574B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop

Landscapes

  • Signal Processing For Digital Recording And Reproducing (AREA)
  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
JP56192619A 1981-11-30 1981-11-30 クロツクパルス発生回路 Granted JPS5894240A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56192619A JPS5894240A (ja) 1981-11-30 1981-11-30 クロツクパルス発生回路

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56192619A JPS5894240A (ja) 1981-11-30 1981-11-30 クロツクパルス発生回路

Publications (2)

Publication Number Publication Date
JPS5894240A true JPS5894240A (ja) 1983-06-04
JPH0156574B2 JPH0156574B2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) 1989-11-30

Family

ID=16294267

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56192619A Granted JPS5894240A (ja) 1981-11-30 1981-11-30 クロツクパルス発生回路

Country Status (1)

Country Link
JP (1) JPS5894240A (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5986333A (ja) * 1982-11-08 1984-05-18 Sanyo Electric Co Ltd クロツクパルス発生回路

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5986333A (ja) * 1982-11-08 1984-05-18 Sanyo Electric Co Ltd クロツクパルス発生回路

Also Published As

Publication number Publication date
JPH0156574B2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) 1989-11-30

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