JPS5891590A - メモリシステム - Google Patents

メモリシステム

Info

Publication number
JPS5891590A
JPS5891590A JP56190068A JP19006881A JPS5891590A JP S5891590 A JPS5891590 A JP S5891590A JP 56190068 A JP56190068 A JP 56190068A JP 19006881 A JP19006881 A JP 19006881A JP S5891590 A JPS5891590 A JP S5891590A
Authority
JP
Japan
Prior art keywords
output
data
clock
address
memory
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP56190068A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0449195B2 (enExample
Inventor
Tomio Nakano
中野　富男
Masao Nakano
正男 中野
Norihisa Tsuge
柘植　典久
Takashi Horii
堀井　孝
Junji Ogawa
淳二 小川
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP56190068A priority Critical patent/JPS5891590A/ja
Publication of JPS5891590A publication Critical patent/JPS5891590A/ja
Publication of JPH0449195B2 publication Critical patent/JPH0449195B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers

Landscapes

  • Static Random-Access Memory (AREA)
JP56190068A 1981-11-27 1981-11-27 メモリシステム Granted JPS5891590A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56190068A JPS5891590A (ja) 1981-11-27 1981-11-27 メモリシステム

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56190068A JPS5891590A (ja) 1981-11-27 1981-11-27 メモリシステム

Publications (2)

Publication Number Publication Date
JPS5891590A true JPS5891590A (ja) 1983-05-31
JPH0449195B2 JPH0449195B2 (enExample) 1992-08-10

Family

ID=16251813

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56190068A Granted JPS5891590A (ja) 1981-11-27 1981-11-27 メモリシステム

Country Status (1)

Country Link
JP (1) JPS5891590A (enExample)

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60157798A (ja) * 1984-01-26 1985-08-19 Toshiba Corp 半導体メモリ
JPS62221750A (ja) * 1986-02-20 1987-09-29 Fujitsu Ltd 半導体メモリ装置
JPH0224752A (ja) * 1988-06-15 1990-01-26 Internatl Business Mach Corp <Ibm> スマート・メモリ・カード
JPH0589663A (ja) * 1991-09-27 1993-04-09 Mitsubishi Electric Corp 半導体記憶装置およびその出力制御方法
JPH076580A (ja) * 1993-07-30 1995-01-10 Oki Electric Ind Co Ltd 半導体記憶回路
WO1997035316A1 (fr) * 1996-03-21 1997-09-25 Hitachi, Ltd. Processeur a memoire dram integree
WO1997035317A1 (fr) * 1996-03-21 1997-09-25 Hitachi, Ltd. Processeur a memoire dram integree
US6504548B2 (en) 1998-09-18 2003-01-07 Hitachi, Ltd. Data processing apparatus having DRAM incorporated therein

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS51138138A (en) * 1975-05-26 1976-11-29 Nippon Telegr & Teleph Corp <Ntt> Semi-conductor storage device
JPS5553757A (en) * 1978-10-17 1980-04-19 Nippon Telegr & Teleph Corp <Ntt> Memory device

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS51138138A (en) * 1975-05-26 1976-11-29 Nippon Telegr & Teleph Corp <Ntt> Semi-conductor storage device
JPS5553757A (en) * 1978-10-17 1980-04-19 Nippon Telegr & Teleph Corp <Ntt> Memory device

Cited By (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60157798A (ja) * 1984-01-26 1985-08-19 Toshiba Corp 半導体メモリ
JPS62221750A (ja) * 1986-02-20 1987-09-29 Fujitsu Ltd 半導体メモリ装置
JPH0224752A (ja) * 1988-06-15 1990-01-26 Internatl Business Mach Corp <Ibm> スマート・メモリ・カード
JPH0589663A (ja) * 1991-09-27 1993-04-09 Mitsubishi Electric Corp 半導体記憶装置およびその出力制御方法
JPH076580A (ja) * 1993-07-30 1995-01-10 Oki Electric Ind Co Ltd 半導体記憶回路
WO1997035316A1 (fr) * 1996-03-21 1997-09-25 Hitachi, Ltd. Processeur a memoire dram integree
WO1997035317A1 (fr) * 1996-03-21 1997-09-25 Hitachi, Ltd. Processeur a memoire dram integree
US6295074B1 (en) 1996-03-21 2001-09-25 Hitachi, Ltd. Data processing apparatus having DRAM incorporated therein
US6496610B2 (en) 1996-03-21 2002-12-17 Hitachi, Ltd. Data processing apparatus having DRAM incorporated therein
US6744437B2 (en) 1996-03-21 2004-06-01 Renesas Technology Corp. Data processing apparatus having DRAM incorporated therein
US6504548B2 (en) 1998-09-18 2003-01-07 Hitachi, Ltd. Data processing apparatus having DRAM incorporated therein

Also Published As

Publication number Publication date
JPH0449195B2 (enExample) 1992-08-10

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