JPS5886733A - 半導体装置 - Google Patents
半導体装置Info
- Publication number
- JPS5886733A JPS5886733A JP56184771A JP18477181A JPS5886733A JP S5886733 A JPS5886733 A JP S5886733A JP 56184771 A JP56184771 A JP 56184771A JP 18477181 A JP18477181 A JP 18477181A JP S5886733 A JPS5886733 A JP S5886733A
- Authority
- JP
- Japan
- Prior art keywords
- film
- layer
- strength
- electrode
- bonding
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/02—Bonding areas ; Manufacturing methods related thereto
- H01L24/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L24/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/023—Redistribution layers [RDL] for bonding areas
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/05001—Internal layers
- H01L2224/05099—Material
- H01L2224/051—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/05117—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950°C
- H01L2224/05124—Aluminium [Al] as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/05599—Material
- H01L2224/056—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/05663—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than 1550°C
- H01L2224/05666—Titanium [Ti] as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01006—Carbon [C]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01013—Aluminum [Al]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01014—Silicon [Si]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01022—Titanium [Ti]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01042—Molybdenum [Mo]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01074—Tungsten [W]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01078—Platinum [Pt]
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Wire Bonding (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP56184771A JPS5886733A (ja) | 1981-11-18 | 1981-11-18 | 半導体装置 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP56184771A JPS5886733A (ja) | 1981-11-18 | 1981-11-18 | 半導体装置 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS5886733A true JPS5886733A (ja) | 1983-05-24 |
| JPS6364898B2 JPS6364898B2 (enExample) | 1988-12-14 |
Family
ID=16159024
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP56184771A Granted JPS5886733A (ja) | 1981-11-18 | 1981-11-18 | 半導体装置 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5886733A (enExample) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0330347A (ja) * | 1989-06-27 | 1991-02-08 | Toshiba Corp | 半導体装置 |
| US6650002B1 (en) | 1997-04-24 | 2003-11-18 | Sharp Kabushiki Kaishi | Semiconductor device having active element connected to an electrode metal pad via a barrier metal layer and interlayer insulating film |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5239378A (en) * | 1975-09-23 | 1977-03-26 | Seiko Epson Corp | Silicon-gated mos type semiconductor device |
| JPS5323567A (en) * | 1976-08-17 | 1978-03-04 | Nec Corp | Electrode structu re of semiconductor element |
| JPS57159035A (en) * | 1981-03-26 | 1982-10-01 | Yamagata Nippon Denki Kk | Manufacture of semiconductor device |
-
1981
- 1981-11-18 JP JP56184771A patent/JPS5886733A/ja active Granted
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5239378A (en) * | 1975-09-23 | 1977-03-26 | Seiko Epson Corp | Silicon-gated mos type semiconductor device |
| JPS5323567A (en) * | 1976-08-17 | 1978-03-04 | Nec Corp | Electrode structu re of semiconductor element |
| JPS57159035A (en) * | 1981-03-26 | 1982-10-01 | Yamagata Nippon Denki Kk | Manufacture of semiconductor device |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0330347A (ja) * | 1989-06-27 | 1991-02-08 | Toshiba Corp | 半導体装置 |
| US6650002B1 (en) | 1997-04-24 | 2003-11-18 | Sharp Kabushiki Kaishi | Semiconductor device having active element connected to an electrode metal pad via a barrier metal layer and interlayer insulating film |
| US6864562B1 (en) | 1997-04-24 | 2005-03-08 | Sharp Kabushiki Kaisha | Semiconductor device having active element connected to an electrode metal pad via a barrier metal layer and interlayer insulating film |
Also Published As
| Publication number | Publication date |
|---|---|
| JPS6364898B2 (enExample) | 1988-12-14 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JPS5944824A (ja) | 自己整合型コンタクトを形成するリフトオフ方法 | |
| JPS62160763A (ja) | 厚い接続電極を有する金属被覆が半導体上に設けられた半導体デバイスの製造方法 | |
| US3939047A (en) | Method for fabricating electrode structure for a semiconductor device having a shallow junction | |
| JPS63213943A (ja) | 三次元半導体集積回路の製造方法 | |
| JPS61214427A (ja) | 半導体装置の電極形成法 | |
| JPS5886733A (ja) | 半導体装置 | |
| JPS622466B2 (enExample) | ||
| JPS583377B2 (ja) | ハンドウタイソウチ ノ セイゾウホウホウ | |
| JP3466543B2 (ja) | ショットキーバリア型半導体装置とその製造方法 | |
| JP2530932B2 (ja) | 電界効果型トランジスタ及びその製造方法 | |
| JPS58123724A (ja) | 半導体装置 | |
| JPH036817A (ja) | 半導体素子の多層電極の製造方法 | |
| JP3688335B2 (ja) | 半導体集積回路装置およびその製造方法ならびに半導体ウエハ | |
| JPS5918632A (ja) | 半導体装置の電極形成方法 | |
| JPS5950091B2 (ja) | 半導体装置の製造方法 | |
| JPS62219934A (ja) | 半導体装置 | |
| JP2530933B2 (ja) | 電界効果型トランジスタ及びその製造方法 | |
| JP2000357701A (ja) | 半導体装置及びその製造方法 | |
| JPS5937576B2 (ja) | 半導体装置 | |
| JPS6059742B2 (ja) | 半導体装置およびその製造方法 | |
| JPS6015150B2 (ja) | 半導体装置の製法 | |
| JP3343282B2 (ja) | 混成集積回路部品 | |
| JPH0547830A (ja) | 半導体装置の製造方法 | |
| JPS5923112B2 (ja) | 半導体装置の電極形成法 | |
| JPS61234074A (ja) | シヨツトキ−バリヤ型半導体装置 |