JPS5875964A - 記録制御方式 - Google Patents
記録制御方式Info
- Publication number
- JPS5875964A JPS5875964A JP56175033A JP17503381A JPS5875964A JP S5875964 A JPS5875964 A JP S5875964A JP 56175033 A JP56175033 A JP 56175033A JP 17503381 A JP17503381 A JP 17503381A JP S5875964 A JPS5875964 A JP S5875964A
- Authority
- JP
- Japan
- Prior art keywords
- memory
- recording
- address
- control
- recording signal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 230000015654 memory Effects 0.000 claims abstract description 39
- 238000000034 method Methods 0.000 description 7
- 238000010586 diagram Methods 0.000 description 4
- 239000013256 coordination polymer Substances 0.000 description 3
- 238000000605 extraction Methods 0.000 description 1
- 238000010438 heat treatment Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N1/00—Scanning, transmission or reproduction of documents or the like, e.g. facsimile transmission; Details thereof
- H04N1/04—Scanning arrangements, i.e. arrangements for the displacement of active reading or reproducing elements relative to the original or reproducing medium, or vice versa
- H04N1/19—Scanning arrangements, i.e. arrangements for the displacement of active reading or reproducing elements relative to the original or reproducing medium, or vice versa using multi-element arrays
Landscapes
- Engineering & Computer Science (AREA)
- Multimedia (AREA)
- Signal Processing (AREA)
- Storing Facsimile Image Data (AREA)
- Fax Reproducing Arrangements (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP56175033A JPS5875964A (ja) | 1981-10-30 | 1981-10-30 | 記録制御方式 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP56175033A JPS5875964A (ja) | 1981-10-30 | 1981-10-30 | 記録制御方式 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS5875964A true JPS5875964A (ja) | 1983-05-07 |
| JPS63987B2 JPS63987B2 (enrdf_load_stackoverflow) | 1988-01-09 |
Family
ID=15989040
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP56175033A Granted JPS5875964A (ja) | 1981-10-30 | 1981-10-30 | 記録制御方式 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5875964A (enrdf_load_stackoverflow) |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5129035A (ja) * | 1974-09-05 | 1976-03-11 | Hitachi Ltd | Mojipataanhatsuseiki |
| JPS53131052A (en) * | 1977-04-18 | 1978-11-15 | Matsushita Electric Ind Co Ltd | Recorder |
| JPS5465417A (en) * | 1977-11-04 | 1979-05-26 | Canon Inc | Heating element selecting device |
| JPS54156415A (en) * | 1978-05-31 | 1979-12-10 | Toshiba Corp | Recording system for facsimile receiver |
-
1981
- 1981-10-30 JP JP56175033A patent/JPS5875964A/ja active Granted
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5129035A (ja) * | 1974-09-05 | 1976-03-11 | Hitachi Ltd | Mojipataanhatsuseiki |
| JPS53131052A (en) * | 1977-04-18 | 1978-11-15 | Matsushita Electric Ind Co Ltd | Recorder |
| JPS5465417A (en) * | 1977-11-04 | 1979-05-26 | Canon Inc | Heating element selecting device |
| JPS54156415A (en) * | 1978-05-31 | 1979-12-10 | Toshiba Corp | Recording system for facsimile receiver |
Also Published As
| Publication number | Publication date |
|---|---|
| JPS63987B2 (enrdf_load_stackoverflow) | 1988-01-09 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US5875486A (en) | Semiconductor memory device with clock timing to activate memory cells for subsequent access | |
| US6115280A (en) | Semiconductor memory capable of burst operation | |
| JPH10302462A (ja) | 半導体記憶装置 | |
| JPH09504898A (ja) | ビットラインセクタページプログラミングを伴なう、1セル当たり1トランジスタのeepromメモリ装置 | |
| US6249481B1 (en) | Semiconductor memory device | |
| KR890010914A (ko) | 시리얼 액세스 메모리로 이루어진 반도체 기억장치 | |
| JPS5875964A (ja) | 記録制御方式 | |
| JPS6113268B2 (enrdf_load_stackoverflow) | ||
| JPS5850693A (ja) | メモリシステムのメモリアクセス方法 | |
| JPS6146916B2 (enrdf_load_stackoverflow) | ||
| JPS58161465A (ja) | 記録制御方式 | |
| JP2995147B2 (ja) | ラインプリンタ | |
| SU849302A1 (ru) | Буферное запоминающее устройство | |
| JP2575752B2 (ja) | マルチポートメモリ | |
| JPH0777077B2 (ja) | 記憶回路 | |
| JPH0443354B2 (enrdf_load_stackoverflow) | ||
| SU746731A1 (ru) | Посто нное запоминающее устройство | |
| SU982084A1 (ru) | Запоминающее устройство с последовательным доступом | |
| JPS61179663A (ja) | 記録ヘツド | |
| JPS6314395A (ja) | 記憶回路 | |
| JPH0620195B2 (ja) | 速度変換回路 | |
| JPS62191945A (ja) | 記憶装置 | |
| JPH0766284B2 (ja) | プログラマブルロジツクコントロ−ラ | |
| JPH0331589B2 (enrdf_load_stackoverflow) | ||
| JPS58119263A (ja) | 記録制御方法 |