JPS5850754A - 選択酸化膜の形成法 - Google Patents

選択酸化膜の形成法

Info

Publication number
JPS5850754A
JPS5850754A JP15033781A JP15033781A JPS5850754A JP S5850754 A JPS5850754 A JP S5850754A JP 15033781 A JP15033781 A JP 15033781A JP 15033781 A JP15033781 A JP 15033781A JP S5850754 A JPS5850754 A JP S5850754A
Authority
JP
Japan
Prior art keywords
layer
silicon
opening
polycrystalline
oxide film
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP15033781A
Other languages
English (en)
Japanese (ja)
Other versions
JPS6141136B2 (enrdf_load_stackoverflow
Inventor
Kenji Tominaga
健司 富永
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electronics Corp
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electronics Corp, Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electronics Corp
Priority to JP15033781A priority Critical patent/JPS5850754A/ja
Publication of JPS5850754A publication Critical patent/JPS5850754A/ja
Publication of JPS6141136B2 publication Critical patent/JPS6141136B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76Making of isolation regions between components
    • H01L21/762Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/76202Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using a local oxidation of silicon, e.g. LOCOS, SWAMI, SILO
    • H01L21/76213Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using a local oxidation of silicon, e.g. LOCOS, SWAMI, SILO introducing electrical inactive or active impurities in the local oxidation region, e.g. to alter LOCOS oxide growth characteristics or for additional isolation purpose
    • H01L21/76216Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using a local oxidation of silicon, e.g. LOCOS, SWAMI, SILO introducing electrical inactive or active impurities in the local oxidation region, e.g. to alter LOCOS oxide growth characteristics or for additional isolation purpose introducing electrical active impurities in the local oxidation region for the sole purpose of creating channel stoppers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76Making of isolation regions between components
    • H01L21/762Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/76202Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using a local oxidation of silicon, e.g. LOCOS, SWAMI, SILO
    • H01L21/76205Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using a local oxidation of silicon, e.g. LOCOS, SWAMI, SILO in a region being recessed from the surface, e.g. in a recess, groove, tub or trench region

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Element Separation (AREA)
  • Local Oxidation Of Silicon (AREA)
JP15033781A 1981-09-21 1981-09-21 選択酸化膜の形成法 Granted JPS5850754A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP15033781A JPS5850754A (ja) 1981-09-21 1981-09-21 選択酸化膜の形成法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15033781A JPS5850754A (ja) 1981-09-21 1981-09-21 選択酸化膜の形成法

Publications (2)

Publication Number Publication Date
JPS5850754A true JPS5850754A (ja) 1983-03-25
JPS6141136B2 JPS6141136B2 (enrdf_load_stackoverflow) 1986-09-12

Family

ID=15494794

Family Applications (1)

Application Number Title Priority Date Filing Date
JP15033781A Granted JPS5850754A (ja) 1981-09-21 1981-09-21 選択酸化膜の形成法

Country Status (1)

Country Link
JP (1) JPS5850754A (enrdf_load_stackoverflow)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63229087A (ja) * 1987-03-17 1988-09-22 東芝テック株式会社 トリマ−付き電気かみそり
US6306726B1 (en) * 1999-08-30 2001-10-23 Micron Technology, Inc. Method of forming field oxide

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0361218A (ja) * 1989-07-27 1991-03-18 Canon Inc シート搬送装置

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63229087A (ja) * 1987-03-17 1988-09-22 東芝テック株式会社 トリマ−付き電気かみそり
US6306726B1 (en) * 1999-08-30 2001-10-23 Micron Technology, Inc. Method of forming field oxide
US6326672B1 (en) 1999-08-30 2001-12-04 Micron Technology, Inc. LOCOS fabrication processes and semiconductive material structures

Also Published As

Publication number Publication date
JPS6141136B2 (enrdf_load_stackoverflow) 1986-09-12

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