JPS58225455A - 装置内蔵トレ−サ制御方式 - Google Patents

装置内蔵トレ−サ制御方式

Info

Publication number
JPS58225455A
JPS58225455A JP57109319A JP10931982A JPS58225455A JP S58225455 A JPS58225455 A JP S58225455A JP 57109319 A JP57109319 A JP 57109319A JP 10931982 A JP10931982 A JP 10931982A JP S58225455 A JPS58225455 A JP S58225455A
Authority
JP
Japan
Prior art keywords
tracer
operation mode
built
service processor
interface
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP57109319A
Other languages
English (en)
Japanese (ja)
Other versions
JPS6360425B2 (enExample
Inventor
Akira Tanaka
明 田中
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP57109319A priority Critical patent/JPS58225455A/ja
Publication of JPS58225455A publication Critical patent/JPS58225455A/ja
Publication of JPS6360425B2 publication Critical patent/JPS6360425B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/36—Prevention of errors by analysis, debugging or testing of software

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Quality & Reliability (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Debugging And Monitoring (AREA)
JP57109319A 1982-06-25 1982-06-25 装置内蔵トレ−サ制御方式 Granted JPS58225455A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP57109319A JPS58225455A (ja) 1982-06-25 1982-06-25 装置内蔵トレ−サ制御方式

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP57109319A JPS58225455A (ja) 1982-06-25 1982-06-25 装置内蔵トレ−サ制御方式

Publications (2)

Publication Number Publication Date
JPS58225455A true JPS58225455A (ja) 1983-12-27
JPS6360425B2 JPS6360425B2 (enExample) 1988-11-24

Family

ID=14507201

Family Applications (1)

Application Number Title Priority Date Filing Date
JP57109319A Granted JPS58225455A (ja) 1982-06-25 1982-06-25 装置内蔵トレ−サ制御方式

Country Status (1)

Country Link
JP (1) JPS58225455A (enExample)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01123322A (ja) * 1987-11-07 1989-05-16 Nec Corp データ処理装置

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01123322A (ja) * 1987-11-07 1989-05-16 Nec Corp データ処理装置

Also Published As

Publication number Publication date
JPS6360425B2 (enExample) 1988-11-24

Similar Documents

Publication Publication Date Title
JPH0823802B2 (ja) アレイディスク装置の状態表示方式
CN118132386A (zh) 系统崩溃信息保存方法、装置和计算机系统
JPS6030984B2 (ja) 多重共通バスを有するデ−タ処理システム
JPS58225455A (ja) 装置内蔵トレ−サ制御方式
CN111552598A (zh) 在轨可重构测控模块
JPS6019803B2 (ja) システムインタフェ−ス制御装置
JPH0332143A (ja) マルチ分散制御交換システムのプロセッサ増設方法
JP2530900B2 (ja) ロ―ディング装置
JPS58197534A (ja) サ−ビス・プロセツサ
JPS59149509A (ja) プログラマブルコントロ−ラ
JPH02127737A (ja) 計算機システムの監視装置
JPH04177504A (ja) プログラマブルコントローラのバックアップ装置
JPS5816497B2 (ja) システム共通部をそなえたデ−タ処理システム
JPH07104822A (ja) 数値制御システム
JPS62212865A (ja) マルチプロセツサ制御方式
JPS5822461A (ja) 緊急動作制御装置
JPH04215156A (ja) リストアおよびバックアップ機能の自動試験方法
JPH04229302A (ja) 制御処理装置
JPH01271813A (ja) 電源制御方式
JPH0317717A (ja) データ処理システム
JPH02129748A (ja) ユニットの動作設定方法
JPS6368951A (ja) チヤネルエラ−ロギング方式
JPH1063702A (ja) マルチプロセス対応ｖｈｄｌシミュレーション実行シス テム
JPH0374708A (ja) 電源制御方式
JPS63304331A (ja) 電子計算機の異常処理自動化方式