JPS58225423A - デ−タ処理装置 - Google Patents

デ−タ処理装置

Info

Publication number
JPS58225423A
JPS58225423A JP57109632A JP10963282A JPS58225423A JP S58225423 A JPS58225423 A JP S58225423A JP 57109632 A JP57109632 A JP 57109632A JP 10963282 A JP10963282 A JP 10963282A JP S58225423 A JPS58225423 A JP S58225423A
Authority
JP
Japan
Prior art keywords
input
time
output
monitor
output control
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP57109632A
Other languages
English (en)
Japanese (ja)
Other versions
JPS6223341B2 (cs
Inventor
Akira Nakayama
中山　昌
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP57109632A priority Critical patent/JPS58225423A/ja
Publication of JPS58225423A publication Critical patent/JPS58225423A/ja
Publication of JPS6223341B2 publication Critical patent/JPS6223341B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/10—Program control for peripheral devices
    • G06F13/12—Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor
    • G06F13/122—Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor where hardware performs an I/O function other than control of data transfer

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Debugging And Monitoring (AREA)
JP57109632A 1982-06-25 1982-06-25 デ−タ処理装置 Granted JPS58225423A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP57109632A JPS58225423A (ja) 1982-06-25 1982-06-25 デ−タ処理装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP57109632A JPS58225423A (ja) 1982-06-25 1982-06-25 デ−タ処理装置

Publications (2)

Publication Number Publication Date
JPS58225423A true JPS58225423A (ja) 1983-12-27
JPS6223341B2 JPS6223341B2 (cs) 1987-05-22

Family

ID=14515193

Family Applications (1)

Application Number Title Priority Date Filing Date
JP57109632A Granted JPS58225423A (ja) 1982-06-25 1982-06-25 デ−タ処理装置

Country Status (1)

Country Link
JP (1) JPS58225423A (cs)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62212856A (ja) * 1986-03-14 1987-09-18 Nec Corp 異常監視装置

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62212856A (ja) * 1986-03-14 1987-09-18 Nec Corp 異常監視装置

Also Published As

Publication number Publication date
JPS6223341B2 (cs) 1987-05-22

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