JPS58224489A - メモリ回路 - Google Patents
メモリ回路Info
- Publication number
- JPS58224489A JPS58224489A JP10820782A JP10820782A JPS58224489A JP S58224489 A JPS58224489 A JP S58224489A JP 10820782 A JP10820782 A JP 10820782A JP 10820782 A JP10820782 A JP 10820782A JP S58224489 A JPS58224489 A JP S58224489A
- Authority
- JP
- Japan
- Prior art keywords
- address
- counter
- output
- data
- clock
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
- G11B27/00—Editing; Indexing; Addressing; Timing or synchronising; Monitoring; Measuring tape travel
- G11B27/10—Indexing; Addressing; Timing or synchronising; Measuring tape travel
- G11B27/102—Programmed access in sequence to addressed parts of tracks of operating record carriers
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
- G11B20/00—Signal processing not specific to the method of recording or reproducing; Circuits therefor
- G11B20/10—Digital recording or reproducing
- G11B20/18—Error detection or correction; Testing, e.g. of drop-outs
- G11B20/1806—Pulse code modulation systems for audio signals
- G11B20/1809—Pulse code modulation systems for audio signals by interleaving
Landscapes
- Engineering & Computer Science (AREA)
- Multimedia (AREA)
- Signal Processing (AREA)
- Signal Processing For Digital Recording And Reproducing (AREA)
Priority Applications (4)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP10820782A JPS58224489A (ja) | 1982-06-21 | 1982-06-21 | メモリ回路 |
| US06/446,403 US4516219A (en) | 1981-12-18 | 1982-12-02 | Address designating method of memory and apparatus therefor |
| DE19823246254 DE3246254A1 (de) | 1981-12-18 | 1982-12-14 | Speicheradressierverfahren |
| DE3249898A DE3249898C2 (enrdf_load_stackoverflow) | 1981-12-18 | 1982-12-14 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP10820782A JPS58224489A (ja) | 1982-06-21 | 1982-06-21 | メモリ回路 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS58224489A true JPS58224489A (ja) | 1983-12-26 |
| JPH0215943B2 JPH0215943B2 (enrdf_load_stackoverflow) | 1990-04-13 |
Family
ID=14478728
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP10820782A Granted JPS58224489A (ja) | 1981-12-18 | 1982-06-21 | メモリ回路 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS58224489A (enrdf_load_stackoverflow) |
-
1982
- 1982-06-21 JP JP10820782A patent/JPS58224489A/ja active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0215943B2 (enrdf_load_stackoverflow) | 1990-04-13 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US4219880A (en) | Signal-processing and conversion systems | |
| JPS59157811A (ja) | デ−タ補間回路 | |
| JP2566206B2 (ja) | 逐次近似レジスタ | |
| US3736581A (en) | High density digital recording | |
| TW538372B (en) | Zero digital sum value control device and method | |
| JPS58224489A (ja) | メモリ回路 | |
| US4453157A (en) | Bi-phase space code data signal reproducing circuit | |
| EP0266159B1 (en) | Digital muting circuit | |
| US4516219A (en) | Address designating method of memory and apparatus therefor | |
| JP3503141B2 (ja) | ディジタル演算処理装置 | |
| JP2511028B2 (ja) | メモリテスト方法 | |
| JPS58108080A (ja) | メモリ回路 | |
| JPS6118153B2 (enrdf_load_stackoverflow) | ||
| JPS60241314A (ja) | デイジタルフイルタ | |
| JP2924968B2 (ja) | 時間双方向シミュレーション装置 | |
| JPS6036146B2 (ja) | 誤り発生回路 | |
| JPS629275A (ja) | 2進レジスタを利用する測定方法および装置 | |
| US3493734A (en) | Automatic line integrator | |
| JPS5888925A (ja) | Adpcm再生器 | |
| JPS58161114A (ja) | メモリアドレス情報信号発生装置 | |
| SU1451694A2 (ru) | Устройство дл цифровой двумерной свертки | |
| KR890004805Y1 (ko) | 씨디롬(cd-rom) 드라이버의 디지탈 데이터 순서 변환회로 | |
| SU883898A1 (ru) | Устройство дл извлечени корн п-й степени | |
| JPS6043744A (ja) | 除算回路 | |
| SU389519A1 (ru) | Функциональный генератор |