JPS58197740A - 集積回路用基板の製造方法 - Google Patents

集積回路用基板の製造方法

Info

Publication number
JPS58197740A
JPS58197740A JP57067474A JP6747482A JPS58197740A JP S58197740 A JPS58197740 A JP S58197740A JP 57067474 A JP57067474 A JP 57067474A JP 6747482 A JP6747482 A JP 6747482A JP S58197740 A JPS58197740 A JP S58197740A
Authority
JP
Japan
Prior art keywords
substrate
silicon
single crystal
films
sio2
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP57067474A
Other languages
English (en)
Japanese (ja)
Other versions
JPS6244411B2 (enrdf_load_stackoverflow
Inventor
Akinobu Satou
佐藤　倬暢
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
JIDO KEISOKU GIJUTSU KENKIYUUKUMIAI
Original Assignee
JIDO KEISOKU GIJUTSU KENKIYUUKUMIAI
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by JIDO KEISOKU GIJUTSU KENKIYUUKUMIAI filed Critical JIDO KEISOKU GIJUTSU KENKIYUUKUMIAI
Priority to JP57067474A priority Critical patent/JPS58197740A/ja
Publication of JPS58197740A publication Critical patent/JPS58197740A/ja
Publication of JPS6244411B2 publication Critical patent/JPS6244411B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/76297—Dielectric isolation using EPIC techniques, i.e. epitaxial passivated integrated circuit

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Local Oxidation Of Silicon (AREA)
  • Bipolar Transistors (AREA)
  • Element Separation (AREA)
JP57067474A 1982-04-23 1982-04-23 集積回路用基板の製造方法 Granted JPS58197740A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP57067474A JPS58197740A (ja) 1982-04-23 1982-04-23 集積回路用基板の製造方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP57067474A JPS58197740A (ja) 1982-04-23 1982-04-23 集積回路用基板の製造方法

Publications (2)

Publication Number Publication Date
JPS58197740A true JPS58197740A (ja) 1983-11-17
JPS6244411B2 JPS6244411B2 (enrdf_load_stackoverflow) 1987-09-21

Family

ID=13345990

Family Applications (1)

Application Number Title Priority Date Filing Date
JP57067474A Granted JPS58197740A (ja) 1982-04-23 1982-04-23 集積回路用基板の製造方法

Country Status (1)

Country Link
JP (1) JPS58197740A (enrdf_load_stackoverflow)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5421958A (en) * 1993-06-07 1995-06-06 The United States Of America As Represented By The Administrator Of The United States National Aeronautics And Space Administration Selective formation of porous silicon
US5439843A (en) * 1992-01-31 1995-08-08 Canon Kabushiki Kaisha Method for preparing a semiconductor substrate using porous silicon

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5439843A (en) * 1992-01-31 1995-08-08 Canon Kabushiki Kaisha Method for preparing a semiconductor substrate using porous silicon
US5421958A (en) * 1993-06-07 1995-06-06 The United States Of America As Represented By The Administrator Of The United States National Aeronautics And Space Administration Selective formation of porous silicon

Also Published As

Publication number Publication date
JPS6244411B2 (enrdf_load_stackoverflow) 1987-09-21

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