JPS58195435U - semiconductor equipment - Google Patents

semiconductor equipment

Info

Publication number
JPS58195435U
JPS58195435U JP9156082U JP9156082U JPS58195435U JP S58195435 U JPS58195435 U JP S58195435U JP 9156082 U JP9156082 U JP 9156082U JP 9156082 U JP9156082 U JP 9156082U JP S58195435 U JPS58195435 U JP S58195435U
Authority
JP
Japan
Prior art keywords
section
semiconductor chip
solder
semiconductor equipment
chip bonding
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP9156082U
Other languages
Japanese (ja)
Other versions
JPH0222989Y2 (en
Inventor
田畑　東三郎
Original Assignee
新電元工業株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 新電元工業株式会社 filed Critical 新電元工業株式会社
Priority to JP9156082U priority Critical patent/JPS58195435U/en
Publication of JPS58195435U publication Critical patent/JPS58195435U/en
Application granted granted Critical
Publication of JPH0222989Y2 publication Critical patent/JPH0222989Y2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies
    • H01L24/741—Apparatus for manufacturing means for bonding, e.g. connectors
    • H01L24/743—Apparatus for manufacturing layer connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
    • H01L2224/741—Apparatus for manufacturing means for bonding, e.g. connectors
    • H01L2224/743—Apparatus for manufacturing layer connectors

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Die Bonding (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第１図及び第２図は従来構造図及びその実装方説明図、
第３図及び第４図は本考案の実施例構造図で夫々ａ図は
平面図、ｂ図は断面図である。図において１は絶縁基板
、２．８は導電層、２ａは　。 半導体チップ接着部、２ｂは半田供給部、２ｃは半田拡
がり阻止部、３は半田、４は半導体トップ、５はヒート
シンク、６は金属基板、９は半田クリーム、１０は半田
ボウル、１１はフラックス、１２は半田阻止材である。Figures 1 and 2 are conventional structural diagrams and illustrations of how to implement them;
FIGS. 3 and 4 are structural diagrams of an embodiment of the present invention, in which figure a is a plan view and figure b is a sectional view, respectively. In the figure, 1 is an insulating substrate, 2.8 is a conductive layer, and 2a is . Semiconductor chip bonding part, 2b solder supply part, 2c solder spread prevention part, 3 solder, 4 semiconductor top, 5 heat sink, 6 metal substrate, 9 solder cream, 10 solder bowl, 11 flux, 12 is a solder blocking material.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 半導体チップと相対面を形成する半導体チップ接着部の
一部と連接してハンダ供給部を設けると共に前記半導体
チップ接着部及びハンダ供給部を囲んでハンダの拡がり
阻止部が形成されてなる絶縁基板を用いたことを特徴と
する半導体装置。An insulating substrate is provided, in which a solder supply section is provided in connection with a part of a semiconductor chip bonding section that forms a surface facing the semiconductor chip, and a solder spread prevention section is formed surrounding the semiconductor chip bonding section and the solder supply section. A semiconductor device characterized by using
JP9156082U 1982-06-21 1982-06-21 semiconductor equipment Granted JPS58195435U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP9156082U JPS58195435U (en) 1982-06-21 1982-06-21 semiconductor equipment

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9156082U JPS58195435U (en) 1982-06-21 1982-06-21 semiconductor equipment

Publications (2)

Publication Number Publication Date
JPS58195435U true JPS58195435U (en) 1983-12-26
JPH0222989Y2 JPH0222989Y2 (en) 1990-06-21

Family

ID=30221567

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9156082U Granted JPS58195435U (en) 1982-06-21 1982-06-21 semiconductor equipment

Country Status (1)

Country Link
JP (1) JPS58195435U (en)

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS548462A (en) * 1977-06-21 1979-01-22 Nec Home Electronics Ltd Manufacture for semiconductor
JPS5517488A (en) * 1978-07-25 1980-02-06 Sharp Corp Electronic watch having another clock function
JPS5753948A (en) * 1980-09-17 1982-03-31 Toshiba Corp Mounting method of semiconductor element

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS548462A (en) * 1977-06-21 1979-01-22 Nec Home Electronics Ltd Manufacture for semiconductor
JPS5517488A (en) * 1978-07-25 1980-02-06 Sharp Corp Electronic watch having another clock function
JPS5753948A (en) * 1980-09-17 1982-03-31 Toshiba Corp Mounting method of semiconductor element

Also Published As

Publication number Publication date
JPH0222989Y2 (en) 1990-06-21

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