JPS58159741U - semiconductor equipment - Google Patents
semiconductor equipmentInfo
- Publication number
- JPS58159741U JPS58159741U JP1982057891U JP5789182U JPS58159741U JP S58159741 U JPS58159741 U JP S58159741U JP 1982057891 U JP1982057891 U JP 1982057891U JP 5789182 U JP5789182 U JP 5789182U JP S58159741 U JPS58159741 U JP S58159741U
- Authority
- JP
- Japan
- Prior art keywords
- semiconductor chip
- bonded
- insulating film
- film substrate
- metal foil
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/50—Tape automated bonding [TAB] connectors, i.e. film carriers; Manufacturing methods related thereto
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第１図は従来の半導体装置の断面図、第２図は本考案に
係る半導体装置の一実施例の断面図を示す。
図中、１：半導体チップ、２：孔、３：絶縁性フイ、
ルム基板、４：銅箔、５：フィンガーリード、６：電極
パッド。FIG. 1 is a sectional view of a conventional semiconductor device, and FIG. 2 is a sectional view of an embodiment of a semiconductor device according to the present invention. In the figure, 1: semiconductor chip, 2: hole, 3: insulating fin,
4: copper foil, 5: finger lead, 6: electrode pad.
Claims (1)
フィルム基板と、該絶縁性フィルム基板との接着面に微
小の凹凸が形成される金属箔とが接着され、前記金属箔
の前記孔に張り出したフィンガーリードの前記凹凸形成
面とは反対側面に前記半導体チップ側電極材料と合金化
して共晶物を生成する金属メッキ層を介して半導体チッ
プがボンディングされることを特徴とする半導体装置。A long insulating film substrate having a hole formed at a position where a semiconductor chip is disposed is bonded to a metal foil having minute irregularities formed on the adhesive surface to the insulating film substrate, and the hole in the metal foil is A semiconductor device characterized in that a semiconductor chip is bonded to a side surface opposite to the surface where the unevenness is formed of the finger leads overhanging through a metal plating layer that is alloyed with the semiconductor chip side electrode material to form a eutectic. .
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1982057891U JPS58159741U (en) | 1982-04-20 | 1982-04-20 | semiconductor equipment |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1982057891U JPS58159741U (en) | 1982-04-20 | 1982-04-20 | semiconductor equipment |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS58159741U true JPS58159741U (en) | 1983-10-25 |
Family
ID=30068314
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1982057891U Pending JPS58159741U (en) | 1982-04-20 | 1982-04-20 | semiconductor equipment |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS58159741U (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH01302832A (en) * | 1988-05-31 | 1989-12-06 | Canon Inc | Electrical circuit device |
-
1982
- 1982-04-20 JP JP1982057891U patent/JPS58159741U/en active Pending
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH01302832A (en) * | 1988-05-31 | 1989-12-06 | Canon Inc | Electrical circuit device |
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