JPS5817656A - 半導体装置の製造方法 - Google Patents

半導体装置の製造方法

Info

Publication number
JPS5817656A
JPS5817656A JP56115068A JP11506881A JPS5817656A JP S5817656 A JPS5817656 A JP S5817656A JP 56115068 A JP56115068 A JP 56115068A JP 11506881 A JP11506881 A JP 11506881A JP S5817656 A JPS5817656 A JP S5817656A
Authority
JP
Japan
Prior art keywords
mask
oxidation
film
region
well
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP56115068A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0115148B2 (cs
Inventor
Junji Ogishima
淳史 荻島
Shinichiro Mitani
真一郎 三谷
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP56115068A priority Critical patent/JPS5817656A/ja
Publication of JPS5817656A publication Critical patent/JPS5817656A/ja
Publication of JPH0115148B2 publication Critical patent/JPH0115148B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/0165—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs the components including complementary IGFETs, e.g. CMOS devices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/02—Manufacture or treatment characterised by using material-based technologies
    • H10D84/03—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
    • H10D84/038—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/80—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs
    • H10D84/82—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components
    • H10D84/83—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components of only insulated-gate FETs [IGFET]
    • H10D84/85—Complementary IGFETs, e.g. CMOS
    • H10D84/859—Complementary IGFETs, e.g. CMOS comprising both N-type and P-type wells, e.g. twin-tub

Landscapes

  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
JP56115068A 1981-07-24 1981-07-24 半導体装置の製造方法 Granted JPS5817656A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56115068A JPS5817656A (ja) 1981-07-24 1981-07-24 半導体装置の製造方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56115068A JPS5817656A (ja) 1981-07-24 1981-07-24 半導体装置の製造方法

Publications (2)

Publication Number Publication Date
JPS5817656A true JPS5817656A (ja) 1983-02-01
JPH0115148B2 JPH0115148B2 (cs) 1989-03-15

Family

ID=14653378

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56115068A Granted JPS5817656A (ja) 1981-07-24 1981-07-24 半導体装置の製造方法

Country Status (1)

Country Link
JP (1) JPS5817656A (cs)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6097663A (ja) * 1983-10-07 1985-05-31 エヌ・ベー・フイリツプス・フルーイランペンフアブリケン 集積回路
US5091332A (en) * 1990-11-19 1992-02-25 Intel Corporation Semiconductor field oxidation process
US5661067A (en) * 1995-07-26 1997-08-26 Lg Semicon Co., Ltd. Method for forming twin well
US5698458A (en) * 1994-09-30 1997-12-16 United Microelectronics Corporation Multiple well device and process of manufacture

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57107066A (en) * 1980-12-25 1982-07-03 Toshiba Corp Complementary semiconductor device and manufacture thereof

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57107066A (en) * 1980-12-25 1982-07-03 Toshiba Corp Complementary semiconductor device and manufacture thereof

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6097663A (ja) * 1983-10-07 1985-05-31 エヌ・ベー・フイリツプス・フルーイランペンフアブリケン 集積回路
US5091332A (en) * 1990-11-19 1992-02-25 Intel Corporation Semiconductor field oxidation process
US5698458A (en) * 1994-09-30 1997-12-16 United Microelectronics Corporation Multiple well device and process of manufacture
US5661067A (en) * 1995-07-26 1997-08-26 Lg Semicon Co., Ltd. Method for forming twin well

Also Published As

Publication number Publication date
JPH0115148B2 (cs) 1989-03-15

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