JPS58169387A - デ−タ転送方式 - Google Patents

デ−タ転送方式

Info

Publication number
JPS58169387A
JPS58169387A JP5279482A JP5279482A JPS58169387A JP S58169387 A JPS58169387 A JP S58169387A JP 5279482 A JP5279482 A JP 5279482A JP 5279482 A JP5279482 A JP 5279482A JP S58169387 A JPS58169387 A JP S58169387A
Authority
JP
Japan
Prior art keywords
data
way
output
clock
gate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP5279482A
Other languages
English (en)
Japanese (ja)
Other versions
JPS6226743B2 (enrdf_load_stackoverflow
Inventor
Takashi Ii
孝 井比
Shuji Ito
修二 伊藤
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP5279482A priority Critical patent/JPS58169387A/ja
Publication of JPS58169387A publication Critical patent/JPS58169387A/ja
Publication of JPS6226743B2 publication Critical patent/JPS6226743B2/ja
Granted legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C7/00Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers

Landscapes

  • Information Transfer Systems (AREA)
JP5279482A 1982-03-31 1982-03-31 デ−タ転送方式 Granted JPS58169387A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP5279482A JPS58169387A (ja) 1982-03-31 1982-03-31 デ−タ転送方式

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP5279482A JPS58169387A (ja) 1982-03-31 1982-03-31 デ−タ転送方式

Publications (2)

Publication Number Publication Date
JPS58169387A true JPS58169387A (ja) 1983-10-05
JPS6226743B2 JPS6226743B2 (enrdf_load_stackoverflow) 1987-06-10

Family

ID=12924737

Family Applications (1)

Application Number Title Priority Date Filing Date
JP5279482A Granted JPS58169387A (ja) 1982-03-31 1982-03-31 デ−タ転送方式

Country Status (1)

Country Link
JP (1) JPS58169387A (enrdf_load_stackoverflow)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60204053A (ja) * 1984-03-27 1985-10-15 Fujitsu Ltd 転送デ−タの選択制御方式

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0327672U (enrdf_load_stackoverflow) * 1989-03-29 1991-03-20

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60204053A (ja) * 1984-03-27 1985-10-15 Fujitsu Ltd 転送デ−タの選択制御方式

Also Published As

Publication number Publication date
JPS6226743B2 (enrdf_load_stackoverflow) 1987-06-10

Similar Documents

Publication Publication Date Title
US4390969A (en) Asynchronous data transmission system with state variable memory and handshaking protocol circuits
US3470542A (en) Modular system design
JP2000029774A (ja) 同期ランダムアクセスメモリ
US3051929A (en) Digital data converter
JPH01200459A (ja) メモリ・インターフエース機構
JPS58169387A (ja) デ−タ転送方式
EP0337993A1 (en) STATE ADJUSTMENT FOR PARALLEL PROCESSING.
JPH0715800B2 (ja) 記憶回路
SU1095397A1 (ru) Преобразователь двоичного сигнала в балансный п тиуровневый сигнал
JPS583615B2 (ja) シンゴウノ ジユジユホウシキ
SU1367017A1 (ru) Устройство дл выбора замещаемого элемента
JPS62194755A (ja) スキユ−補償方式
SU1254485A1 (ru) Устройство дл распределени групповых за вок по процессорам
RU2042196C1 (ru) Устройство для моделирования цифровых схем
SU1100623A1 (ru) Устройство дл распределени заданий вычислительной системе
SU1193827A1 (ru) Преобразователь последовательного кода в параллельный
SU739527A1 (ru) Устройство дл упор доченной выборки значений параметра
JPS5851456B2 (ja) 遠方監視制御装置における多ル−ト制御方式
SU1444787A1 (ru) Устройство дл сопр жени канала передачи данных с магистралью
SU741451A1 (ru) Устройство декодировани импульсной последовательности
JPH0625957B2 (ja) クロツク乗りかえ回路
JPS61256458A (ja) 情報転送方式
JPS5868298A (ja) シフトレジスタ回路
JPS61285524A (ja) 論理回路出力伝送方式
JPH0568048A (ja) 光fifoメモリ