JPS58118488U - Keystroke strength control circuit for automatic performance pianos - Google Patents

Keystroke strength control circuit for automatic performance pianos

Info

Publication number
JPS58118488U
JPS58118488U JP1502182U JP1502182U JPS58118488U JP S58118488 U JPS58118488 U JP S58118488U JP 1502182 U JP1502182 U JP 1502182U JP 1502182 U JP1502182 U JP 1502182U JP S58118488 U JPS58118488 U JP S58118488U
Authority
JP
Japan
Prior art keywords
circuit
keystroke strength
outputs
control circuit
strength control
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1502182U
Other languages
Japanese (ja)
Inventor
孝司 村山
Original Assignee
ヤマハ株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by ヤマハ株式会社 filed Critical ヤマハ株式会社
Priority to JP1502182U priority Critical patent/JPS58118488U/en
Publication of JPS58118488U publication Critical patent/JPS58118488U/en
Pending legal-status Critical Current

Links

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は従来の自動演奏用ピアノにおける打鍵強度制御
回路の構成例を示すブロック図、第2図は第1図の各部
の出力波形を示す波形図、第3図はこの考案の一実施例
の構成を示すブロック図、第4図は第3図の各部の出力
波形を示す波形図、第5図は7ビツトのプリセットカウ
ンタをMOS・LSIで構成する場合の具体的回路例を
示す回路図、第6図は7ビツトの一致回路をMOS 、
LSIで構成する場合の具体的回路例を示す回路図であ
る。 2・・・・・・カウンタ回路、4−1〜4−・n・・・
・・・打鍵強度情報出力回路(データ出力回路)、8−
1〜8−n・・・・・・−数回L5−1〜5−n・・・
・・・パルス発生回路。
Fig. 1 is a block diagram showing a configuration example of a keystroke strength control circuit in a conventional automatic performance piano, Fig. 2 is a waveform diagram showing output waveforms of each part of Fig. 1, and Fig. 3 is an example of an embodiment of this invention. 4 is a waveform diagram showing the output waveforms of each part in FIG. 3, and FIG. 5 is a circuit diagram showing a specific circuit example when a 7-bit preset counter is configured with MOS/LSI. , Figure 6 shows a 7-bit matching circuit in MOS form,
FIG. 2 is a circuit diagram showing a specific example of a circuit when configured with an LSI. 2... Counter circuit, 4-1 to 4-.n...
... Keystroke strength information output circuit (data output circuit), 8-
1~8-n...-Several times L5-1~5-n...
...Pulse generation circuit.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] クロックパルスを計数し、その計数結果を出力すると共
に、前記計数結果が所定の値に達したとき、リセット信
号を出力するカウンタ回路と、打鍵強度情報を出力する
打鍵強度情報出力回路と、前記カウンタ回路から出力さ
れる計数結果と、前記打鍵強度情報出力回路の出力デー
タとが一致したとぎ、一致信号を出力する回章回路と、
−前記一致信号によりセットされ、前記リセット信号に
より゛リセットされるパルス発生回路とを具備してなる
自動演奏用ピアノにおける打鍵強度制御回路。
a counter circuit that counts clock pulses, outputs the counting result, and outputs a reset signal when the counting result reaches a predetermined value; a keystroke strength information output circuit that outputs keystroke strength information; a circulation circuit that outputs a coincidence signal when the counting result output from the circuit matches the output data of the keystroke strength information output circuit;
- A keystroke strength control circuit for a self-playing piano, comprising a pulse generation circuit that is set by the coincidence signal and reset by the reset signal.
JP1502182U 1982-02-05 1982-02-05 Keystroke strength control circuit for automatic performance pianos Pending JPS58118488U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1502182U JPS58118488U (en) 1982-02-05 1982-02-05 Keystroke strength control circuit for automatic performance pianos

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1502182U JPS58118488U (en) 1982-02-05 1982-02-05 Keystroke strength control circuit for automatic performance pianos

Publications (1)

Publication Number Publication Date
JPS58118488U true JPS58118488U (en) 1983-08-12

Family

ID=30027467

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1502182U Pending JPS58118488U (en) 1982-02-05 1982-02-05 Keystroke strength control circuit for automatic performance pianos

Country Status (1)

Country Link
JP (1) JPS58118488U (en)

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4844823A (en) * 1971-10-08 1973-06-27
JPS5614298A (en) * 1979-07-16 1981-02-12 Nippon Marantz String striking strength changing circuit for automatically performing piano
JPS587191B2 (en) * 1975-03-20 1983-02-08 セイコーエプソン株式会社 Automatic rate slow/slow crystal clock

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4844823A (en) * 1971-10-08 1973-06-27
JPS587191B2 (en) * 1975-03-20 1983-02-08 セイコーエプソン株式会社 Automatic rate slow/slow crystal clock
JPS5614298A (en) * 1979-07-16 1981-02-12 Nippon Marantz String striking strength changing circuit for automatically performing piano

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