JPS58114422A - 半導体装置用基板の製造方法 - Google Patents

半導体装置用基板の製造方法

Info

Publication number
JPS58114422A
JPS58114422A JP20977081A JP20977081A JPS58114422A JP S58114422 A JPS58114422 A JP S58114422A JP 20977081 A JP20977081 A JP 20977081A JP 20977081 A JP20977081 A JP 20977081A JP S58114422 A JPS58114422 A JP S58114422A
Authority
JP
Japan
Prior art keywords
substrate
insulating film
window
film
single crystal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP20977081A
Other languages
English (en)
Japanese (ja)
Other versions
JPS6347252B2 (enExample
Inventor
Haruhisa Mori
森　治久
Junji Sakurai
桜井　潤治
Hajime Kamioka
上岡　元
Seiichiro Kawamura
河村　誠一郎
Motoo Nakano
元雄 中野
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP20977081A priority Critical patent/JPS58114422A/ja
Publication of JPS58114422A publication Critical patent/JPS58114422A/ja
Publication of JPS6347252B2 publication Critical patent/JPS6347252B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/26—Bombardment with radiation
    • H01L21/263—Bombardment with radiation with high-energy radiation
    • H01L21/268—Bombardment with radiation with high-energy radiation using electromagnetic radiation, e.g. laser radiation

Landscapes

  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • High Energy & Nuclear Physics (AREA)
  • Optics & Photonics (AREA)
  • Health & Medical Sciences (AREA)
  • Toxicology (AREA)
  • Electromagnetism (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Recrystallisation Techniques (AREA)
JP20977081A 1981-12-28 1981-12-28 半導体装置用基板の製造方法 Granted JPS58114422A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP20977081A JPS58114422A (ja) 1981-12-28 1981-12-28 半導体装置用基板の製造方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP20977081A JPS58114422A (ja) 1981-12-28 1981-12-28 半導体装置用基板の製造方法

Publications (2)

Publication Number Publication Date
JPS58114422A true JPS58114422A (ja) 1983-07-07
JPS6347252B2 JPS6347252B2 (enExample) 1988-09-21

Family

ID=16578317

Family Applications (1)

Application Number Title Priority Date Filing Date
JP20977081A Granted JPS58114422A (ja) 1981-12-28 1981-12-28 半導体装置用基板の製造方法

Country Status (1)

Country Link
JP (1) JPS58114422A (enExample)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5079183A (en) * 1983-07-15 1992-01-07 Kabushiki Kaisha Toshiba C-mos device and a process for manufacturing the same
US5401683A (en) * 1987-12-04 1995-03-28 Agency Of Industrial Science And Technology Method of manufacturing a multi-layered semiconductor substrate

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5079183A (en) * 1983-07-15 1992-01-07 Kabushiki Kaisha Toshiba C-mos device and a process for manufacturing the same
US5401683A (en) * 1987-12-04 1995-03-28 Agency Of Industrial Science And Technology Method of manufacturing a multi-layered semiconductor substrate

Also Published As

Publication number Publication date
JPS6347252B2 (enExample) 1988-09-21

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