JPS58101398A - 読取デ−タのメモリ格納方式 - Google Patents

読取デ−タのメモリ格納方式

Info

Publication number
JPS58101398A
JPS58101398A JP56198456A JP19845681A JPS58101398A JP S58101398 A JPS58101398 A JP S58101398A JP 56198456 A JP56198456 A JP 56198456A JP 19845681 A JP19845681 A JP 19845681A JP S58101398 A JPS58101398 A JP S58101398A
Authority
JP
Japan
Prior art keywords
data
change
signal
circuit
output
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP56198456A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0232666B2 (https=
Inventor
弘之 西村
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Omron Corp
Original Assignee
Tateisi Electronics Co
Omron Tateisi Electronics Co
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tateisi Electronics Co, Omron Tateisi Electronics Co filed Critical Tateisi Electronics Co
Priority to JP56198456A priority Critical patent/JPS58101398A/ja
Publication of JPS58101398A publication Critical patent/JPS58101398A/ja
Publication of JPH0232666B2 publication Critical patent/JPH0232666B2/ja
Granted legal-status Critical Current

Links

Landscapes

  • Image Input (AREA)
  • Image Analysis (AREA)
JP56198456A 1981-12-11 1981-12-11 読取デ−タのメモリ格納方式 Granted JPS58101398A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56198456A JPS58101398A (ja) 1981-12-11 1981-12-11 読取デ−タのメモリ格納方式

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56198456A JPS58101398A (ja) 1981-12-11 1981-12-11 読取デ−タのメモリ格納方式

Publications (2)

Publication Number Publication Date
JPS58101398A true JPS58101398A (ja) 1983-06-16
JPH0232666B2 JPH0232666B2 (https=) 1990-07-23

Family

ID=16391399

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56198456A Granted JPS58101398A (ja) 1981-12-11 1981-12-11 読取デ−タのメモリ格納方式

Country Status (1)

Country Link
JP (1) JPS58101398A (https=)

Also Published As

Publication number Publication date
JPH0232666B2 (https=) 1990-07-23

Similar Documents

Publication Publication Date Title
EP0484652B1 (en) First-in-first-out buffer
JPS58129552A (ja) 演算処理装置
JPS58101398A (ja) 読取デ−タのメモリ格納方式
JPS598887B2 (ja) デイジタル記録装置における符号誤り補償回路装置
SU1034069A1 (ru) Буферное запоминающее устройство
SU1022216A1 (ru) Устройство дл контрол доменной пам ти
SU1129655A1 (ru) Запоминающее устройство с обнаружением ошибок
SU1361633A2 (ru) Буферное запоминающее устройство
SU1524093A1 (ru) Буферное запоминающее устройство
US5479165A (en) Two-dimensional coding apparatus
RU1789993C (ru) Устройство дл редактировани элементов таблиц
JPH01112449A (ja) 速度変換メモリ装置
SU1019429A1 (ru) Устройство дл вывода информации
SU1183975A1 (ru) Устройство дл сопр жени разноскоростных вычислительных устройств
SU1383445A1 (ru) Устройство дл задержки цифровой информации
SU1332383A1 (ru) Последовательное буферное запоминающее устройство
SU1591074A1 (ru) Буферное запоминающее устройство
JP2641066B2 (ja) カウンタ装置
KR890004805Y1 (ko) 씨디롬(cd-rom) 드라이버의 디지탈 데이터 순서 변환회로
SU1481854A1 (ru) Динамическое запоминающее устройство
RU2024076C1 (ru) Ячейка памяти
SU1619282A1 (ru) Запоминающее устройство
JP3088144B2 (ja) Fifoリセット回路
SU1310897A1 (ru) Сверхоперативное запоминающее устройство
JPS59178557A (ja) 計数装置