JPS5793721A - Schmitt circuit - Google Patents
Schmitt circuitInfo
- Publication number
- JPS5793721A JPS5793721A JP55170069A JP17006980A JPS5793721A JP S5793721 A JPS5793721 A JP S5793721A JP 55170069 A JP55170069 A JP 55170069A JP 17006980 A JP17006980 A JP 17006980A JP S5793721 A JPS5793721 A JP S5793721A
- Authority
- JP
- Japan
- Prior art keywords
- igfet
- channel type
- level
- inverter
- output
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
- H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
- H03K3/353—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of field-effect transistors with internal or external positive feedback
- H03K3/356—Bistable circuits
- H03K3/3565—Bistables with hysteresis, e.g. Schmitt trigger
Landscapes
- Manipulation Of Pulses (AREA)
Abstract
PURPOSE:To set high and low levels independently, by adjusting the high level of threshold of a Schmitt circuit with a (gm) of an IGFET of N channel type and the low level with a (gm) of an IGFET of P channel type. CONSTITUTION:When an input level increases from a low level, an N channel IGFET 6 of an inverter 15 gradually turns on, a P channel type IGFET gradually turns off, and an output level of the inverter is lowered. In this case, since an N channel type IGFET 14 of a transfer gate 19 turns on, the output level of an inverter 17 is lowered. When the input level further increases, the sum of (gm) of the N channel type IGFET 6 and the N channel type IGFET 14 exceeds the (gm) of a P channel type IGFET 9 of the inverter 17, and the output of inverters 17, 18 becomes low level rapidly and the output of an inverter 16 becomes high level quickly.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP55170069A JPS5793721A (en) | 1980-12-02 | 1980-12-02 | Schmitt circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP55170069A JPS5793721A (en) | 1980-12-02 | 1980-12-02 | Schmitt circuit |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS5793721A true JPS5793721A (en) | 1982-06-10 |
Family
ID=15898051
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP55170069A Pending JPS5793721A (en) | 1980-12-02 | 1980-12-02 | Schmitt circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5793721A (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS61263307A (en) * | 1985-05-17 | 1986-11-21 | Matsushita Electric Ind Co Ltd | One-shot multivibrator circuit |
US5341033A (en) * | 1992-11-23 | 1994-08-23 | Analog Devices, Inc. | Input buffer circuit with deglitch method and apparatus |
-
1980
- 1980-12-02 JP JP55170069A patent/JPS5793721A/en active Pending
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS61263307A (en) * | 1985-05-17 | 1986-11-21 | Matsushita Electric Ind Co Ltd | One-shot multivibrator circuit |
US5341033A (en) * | 1992-11-23 | 1994-08-23 | Analog Devices, Inc. | Input buffer circuit with deglitch method and apparatus |
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