JPS5793549A - Manufacture of semiconductor device - Google Patents

Manufacture of semiconductor device

Info

Publication number
JPS5793549A
JPS5793549A JP55170396A JP17039680A JPS5793549A JP S5793549 A JPS5793549 A JP S5793549A JP 55170396 A JP55170396 A JP 55170396A JP 17039680 A JP17039680 A JP 17039680A JP S5793549 A JPS5793549 A JP S5793549A
Authority
JP
Japan
Prior art keywords
layer
film
pattern
semiconductor device
forming
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP55170396A
Other languages
Japanese (ja)
Inventor
Yoshiaki Tanimoto
Akira Abiru
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP55170396A priority Critical patent/JPS5793549A/en
Publication of JPS5793549A publication Critical patent/JPS5793549A/en
Pending legal-status Critical Current

Links

Landscapes

  • Exposure And Positioning Against Photoresist Photosensitive Materials (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Weting (AREA)
  • Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)

Abstract

PURPOSE:To shorten the manufacturing steps of a semiconductor device and to reduce the cost thereof by forming a pattern of an electrode wire readily without a photoresist film, thereby forming an IC or the like. CONSTITUTION:A PSG film 7 is formed on an Si substrate 6 formed with a source region 2 and a drain region 3, etc. a connecting hole 8 is opened, an aluminum layer 9 is deposited, a Cu layer 10 is deposted, and an SiO2 film 11 is further formed by a CVD method. Thereafter, when the film 11 is emitted in the prescribed pattern by a CO2 laser of 10mum of wavelength and 20-30W of power, the layers 9 and 10 are alloyed, and a specific pattern is formed. Then, it is plasma etched to remove the SiO2 film, the Cu layer is also dissolved with aqueous ammonia solution, with the layer 21 as a mask, the aluminum layer is removed with CCl4 gas, the alloy 21 of Cu and Al remains, and the wiring layer of the prescribed pattern (source and drain electrodes) can be formed.
JP55170396A 1980-12-03 1980-12-03 Manufacture of semiconductor device Pending JPS5793549A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP55170396A JPS5793549A (en) 1980-12-03 1980-12-03 Manufacture of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP55170396A JPS5793549A (en) 1980-12-03 1980-12-03 Manufacture of semiconductor device

Publications (1)

Publication Number Publication Date
JPS5793549A true JPS5793549A (en) 1982-06-10

Family

ID=15904145

Family Applications (1)

Application Number Title Priority Date Filing Date
JP55170396A Pending JPS5793549A (en) 1980-12-03 1980-12-03 Manufacture of semiconductor device

Country Status (1)

Country Link
JP (1) JPS5793549A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62279677A (en) * 1986-03-21 1987-12-04 アドバンスド、パワ−、テクノロジ−、インコ−ポレ−テツド Manufacture of semiconductor device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62279677A (en) * 1986-03-21 1987-12-04 アドバンスド、パワ−、テクノロジ−、インコ−ポレ−テツド Manufacture of semiconductor device

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