JPS5790977A - Double-layer gate polysilicon mos transistor - Google Patents

Double-layer gate polysilicon mos transistor

Info

Publication number
JPS5790977A
JPS5790977A JP16689180A JP16689180A JPS5790977A JP S5790977 A JPS5790977 A JP S5790977A JP 16689180 A JP16689180 A JP 16689180A JP 16689180 A JP16689180 A JP 16689180A JP S5790977 A JPS5790977 A JP S5790977A
Authority
JP
Japan
Prior art keywords
polysilicon
fet
layers
gate electrode
insulating
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP16689180A
Other languages
Japanese (ja)
Inventor
Akira Saito
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Seiko Epson Corp
Suwa Seikosha KK
Original Assignee
Seiko Epson Corp
Suwa Seikosha KK
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Seiko Epson Corp, Suwa Seikosha KK filed Critical Seiko Epson Corp
Priority to JP16689180A priority Critical patent/JPS5790977A/en
Publication of JPS5790977A publication Critical patent/JPS5790977A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H01L29/78645—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with multiple gate
    • H01L29/78648—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with multiple gate arranged on opposing sides of the channel
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Electrodes Of Semiconductors (AREA)

Abstract

PURPOSE:To improve the conductance characteristic of a polysilicon FET and to make it practicable by a method wherein three-layer polysilicon layers are laid via insulating layers on an insulating substrated and its uppermost and lowest layers constitute gate electrodes and intermediate layers form a channel area of two layers. CONSTITUTION:A lower gate electrode 22 is constructed with polysilicon doped with impurity of the same type as the source and drain of an FET on an insulating (for example, glass) substrate 21, and a lower gate film 23 is laid on the surface of the FET. Next, a polysilicon layer 24 constituting the FET main body is built with conductivity and concentration to obtain a fixed characteristic, and an upper gate film 26 is deposited on the surface. Subsequently, after an upper gate electrode 27 has been constructed with polysilicon same as lower gate electrode 22 impurities are introduced in the source and drain region 25 of the polysilicon layer 24 to construct an FET configuration. With this construction with which channel regions are built in two layers above and below the polysilicon layer 24, a conductance characteristic can be improved even in a low- mobility polysilicon FET, offering availability of low-priced elements.
JP16689180A 1980-11-27 1980-11-27 Double-layer gate polysilicon mos transistor Pending JPS5790977A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP16689180A JPS5790977A (en) 1980-11-27 1980-11-27 Double-layer gate polysilicon mos transistor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP16689180A JPS5790977A (en) 1980-11-27 1980-11-27 Double-layer gate polysilicon mos transistor

Publications (1)

Publication Number Publication Date
JPS5790977A true JPS5790977A (en) 1982-06-05

Family

ID=15839534

Family Applications (1)

Application Number Title Priority Date Filing Date
JP16689180A Pending JPS5790977A (en) 1980-11-27 1980-11-27 Double-layer gate polysilicon mos transistor

Country Status (1)

Country Link
JP (1) JPS5790977A (en)

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6081869A (en) * 1983-10-12 1985-05-09 Seiko Epson Corp Driving method of thin film transistor
JPS6094773A (en) * 1983-10-27 1985-05-27 Agency Of Ind Science & Technol Field effect transistor
US4720736A (en) * 1985-01-24 1988-01-19 Sharp Kabushiki Kaisha Amorphous silicon thin film transistor
US4757361A (en) * 1986-07-23 1988-07-12 International Business Machines Corporation Amorphous thin film transistor device
US4958205A (en) * 1985-03-29 1990-09-18 Matsushita Electric Industrial Co., Ltd. Thin film transistor array and method of manufacturing the same
US5079606A (en) * 1989-01-26 1992-01-07 Casio Computer Co., Ltd. Thin-film memory element
US5140391A (en) * 1987-08-24 1992-08-18 Sony Corporation Thin film MOS transistor having pair of gate electrodes opposing across semiconductor layer
US5166086A (en) * 1985-03-29 1992-11-24 Matsushita Electric Industrial Co., Ltd. Thin film transistor array and method of manufacturing same

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5235585A (en) * 1975-08-29 1977-03-18 Westinghouse Electric Corp Thin film transistor
JPS55132072A (en) * 1979-03-31 1980-10-14 Toshiba Corp Mos semiconductor device

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5235585A (en) * 1975-08-29 1977-03-18 Westinghouse Electric Corp Thin film transistor
JPS55132072A (en) * 1979-03-31 1980-10-14 Toshiba Corp Mos semiconductor device

Cited By (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6081869A (en) * 1983-10-12 1985-05-09 Seiko Epson Corp Driving method of thin film transistor
JPS6094773A (en) * 1983-10-27 1985-05-27 Agency Of Ind Science & Technol Field effect transistor
US4720736A (en) * 1985-01-24 1988-01-19 Sharp Kabushiki Kaisha Amorphous silicon thin film transistor
US4958205A (en) * 1985-03-29 1990-09-18 Matsushita Electric Industrial Co., Ltd. Thin film transistor array and method of manufacturing the same
US5137841A (en) * 1985-03-29 1992-08-11 Matsushita Electric Industrial Co., Ltd. Method of manufacturing a thin film transistor using positive and negative photoresists
US5166086A (en) * 1985-03-29 1992-11-24 Matsushita Electric Industrial Co., Ltd. Thin film transistor array and method of manufacturing same
US4757361A (en) * 1986-07-23 1988-07-12 International Business Machines Corporation Amorphous thin film transistor device
US5140391A (en) * 1987-08-24 1992-08-18 Sony Corporation Thin film MOS transistor having pair of gate electrodes opposing across semiconductor layer
US5079606A (en) * 1989-01-26 1992-01-07 Casio Computer Co., Ltd. Thin-film memory element

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