JPS5780721A - Method of forming low resistance contact in semiconductor device - Google Patents

Method of forming low resistance contact in semiconductor device

Info

Publication number
JPS5780721A
JPS5780721A JP56144038A JP14403881A JPS5780721A JP S5780721 A JPS5780721 A JP S5780721A JP 56144038 A JP56144038 A JP 56144038A JP 14403881 A JP14403881 A JP 14403881A JP S5780721 A JPS5780721 A JP S5780721A
Authority
JP
Japan
Prior art keywords
semiconductor device
low resistance
resistance contact
forming low
forming
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP56144038A
Other languages
English (en)
Inventor
Furankurin Reiru Robaato
Uongu Kanguurungu
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
General Electric Co
Original Assignee
General Electric Co
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by General Electric Co filed Critical General Electric Co
Publication of JPS5780721A publication Critical patent/JPS5780721A/ja
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/26—Bombardment with radiation
    • H01L21/263—Bombardment with radiation with high-energy radiation
    • H01L21/265—Bombardment with radiation with high-energy radiation producing ion implantation
    • H01L21/26506—Bombardment with radiation with high-energy radiation producing ion implantation in group IV semiconductors
    • H01L21/26513—Bombardment with radiation with high-energy radiation producing ion implantation in group IV semiconductors of electrically active species
    • H01L21/2652—Through-implantation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/283—Deposition of conductive or insulating materials for electrodes conducting electric current
    • H01L21/285—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation
    • H01L21/28506—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers
    • H01L21/28512—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table
    • H01L21/28518—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table the conductive layers comprising silicides

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • High Energy & Nuclear Physics (AREA)
  • Health & Medical Sciences (AREA)
  • Toxicology (AREA)
  • Electrodes Of Semiconductors (AREA)
JP56144038A 1980-09-15 1981-09-14 Method of forming low resistance contact in semiconductor device Pending JPS5780721A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US06/187,043 US4339869A (en) 1980-09-15 1980-09-15 Method of making low resistance contacts in semiconductor devices by ion induced silicides

Publications (1)

Publication Number Publication Date
JPS5780721A true JPS5780721A (en) 1982-05-20

Family

ID=22687378

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56144038A Pending JPS5780721A (en) 1980-09-15 1981-09-14 Method of forming low resistance contact in semiconductor device

Country Status (6)

Country Link
US (1) US4339869A (ja)
JP (1) JPS5780721A (ja)
DE (1) DE3135993A1 (ja)
FR (1) FR2513011A1 (ja)
GB (1) GB2083949A (ja)
IT (1) IT1138547B (ja)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59208773A (ja) * 1983-05-12 1984-11-27 Nec Corp 半導体装置の製造方法
JPS59208772A (ja) * 1983-05-12 1984-11-27 Nec Corp 半導体装置の製造方法
JPS61274325A (ja) * 1985-05-29 1986-12-04 Mitsubishi Electric Corp 半導体装置の製造方法

Families Citing this family (36)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4551908A (en) * 1981-06-15 1985-11-12 Nippon Electric Co., Ltd. Process of forming electrodes and interconnections on silicon semiconductor devices
US4378628A (en) * 1981-08-27 1983-04-05 Bell Telephone Laboratories, Incorporated Cobalt silicide metallization for semiconductor integrated circuits
JPS58188157A (ja) * 1982-04-28 1983-11-02 Toshiba Corp 半導体装置およびその製造方法
US4503451A (en) * 1982-07-30 1985-03-05 Motorola, Inc. Low resistance buried power bus for integrated circuits
US4558507A (en) * 1982-11-12 1985-12-17 Nec Corporation Method of manufacturing semiconductor device
US4521952A (en) * 1982-12-02 1985-06-11 International Business Machines Corporation Method of making integrated circuits using metal silicide contacts
SE8306663L (sv) * 1982-12-08 1984-06-09 Int Rectifier Corp Forfarande for framstellning av halvledaranordning
US4965173A (en) * 1982-12-08 1990-10-23 International Rectifier Corporation Metallizing process and structure for semiconductor devices
DE3304588A1 (de) * 1983-02-10 1984-08-16 Siemens AG, 1000 Berlin und 8000 München Verfahren zum herstellen von mos-transistoren mit flachen source/drain-gebieten, kurzen kanallaengen und einer selbstjustierten, aus einem metallsilizid bestehenden kontaktierungsebene
US4450620A (en) * 1983-02-18 1984-05-29 Bell Telephone Laboratories, Incorporated Fabrication of MOS integrated circuit devices
KR910006249B1 (ko) * 1983-04-01 1991-08-17 가부시기가이샤 히다찌세이사꾸쇼 반도체 장치
JPS59210642A (ja) * 1983-05-16 1984-11-29 Hitachi Ltd 半導体装置の製造方法
JPS60132353A (ja) * 1983-12-20 1985-07-15 Mitsubishi Electric Corp 半導体装置の製造方法
US4851295A (en) * 1984-03-16 1989-07-25 Genus, Inc. Low resistivity tungsten silicon composite film
FR2578272B1 (fr) * 1985-03-01 1987-05-22 Centre Nat Rech Scient Procede de formation sur un substrat d'une couche de siliciure de tungstene, utilisable notamment pour la realisation de couches d'interconnexion des circuits integres.
EP0193934B1 (en) * 1985-03-07 1993-07-21 Kabushiki Kaisha Toshiba Semiconductor integreated circuit device and method of manufacturing the same
JPH0799738B2 (ja) * 1985-09-05 1995-10-25 三菱電機株式会社 半導体装置の製造方法
US4843033A (en) * 1985-09-27 1989-06-27 Texas Instruments Incorporated Method for outdiffusion of zinc into III-V substrates using zinc tungsten silicide as dopant source
US4788160A (en) * 1987-03-31 1988-11-29 Texas Instruments Incorporated Process for formation of shallow silicided junctions
US4816423A (en) * 1987-05-01 1989-03-28 Texas Instruments Incorporated Bicmos process for forming shallow npn emitters and mosfet source/drains
US5059546A (en) * 1987-05-01 1991-10-22 Texas Instruments Incorporated BICMOS process for forming shallow NPN emitters and mosfet source/drains
FR2624304B1 (fr) * 1987-12-04 1990-05-04 Philips Nv Procede pour etablir une structure d'interconnexion electrique sur un dispositif semiconducteur au silicium
US4998157A (en) * 1988-08-06 1991-03-05 Seiko Epson Corporation Ohmic contact to silicon substrate
US4908334A (en) * 1989-01-24 1990-03-13 The United States Of America As Represented By The United States Department Of Energy Method for forming metallic silicide films on silicon substrates by ion beam deposition
US5217924A (en) * 1989-05-12 1993-06-08 Texas Instruments Incorporated Method for forming shallow junctions with a low resistivity silicide layer
US5087322A (en) * 1990-10-24 1992-02-11 Cornell Research Foundation, Inc. Selective metallization for high temperature semiconductors
KR100214036B1 (ko) * 1991-02-19 1999-08-02 이데이 노부유끼 알루미늄계 배선형성방법
JP2891093B2 (ja) * 1994-02-17 1999-05-17 日本電気株式会社 半導体集積回路の製造方法
JP2614016B2 (ja) * 1994-05-31 1997-05-28 九州日本電気株式会社 半導体装置の製造方法
EP0865077A1 (en) * 1997-03-14 1998-09-16 Interuniversitair Micro-Elektronica Centrum Vzw Method for the formation of a thin metal silicide layer on a Si substrate, and use thereof in detector applications
DE19746961C2 (de) * 1997-10-24 1999-08-12 Ernst Lueder Verfahren zur Herstellung von Dünnschichttransistoren
US6303969B1 (en) * 1998-05-01 2001-10-16 Allen Tan Schottky diode with dielectric trench
DE69832162D1 (de) 1998-07-22 2005-12-08 St Microelectronics Srl Herstellungsverfahren für ein elektronisches Bauelement, das MOS Transistoren mit salizidierten Übergängen und nicht salizidierten Widerständen enthält
US6605321B1 (en) * 2000-07-20 2003-08-12 Centre National De La Recherche Scientifique (Cnrs) Method of treating materials by irradiation
US8268081B2 (en) * 2008-10-02 2012-09-18 Varian Semiconductor Equipment Associates, Inc. Platen cleaning method
US11721801B2 (en) 2020-08-17 2023-08-08 International Business Machines Corporation, Armonk Low resistance composite silicon-based electrode

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2030024A6 (en) * 1967-11-08 1970-10-30 Comp Generale Electricite Alloyed junction tunnel diode
US3753774A (en) * 1971-04-05 1973-08-21 Rca Corp Method for making an intermetallic contact to a semiconductor device
US3964084A (en) * 1974-06-12 1976-06-15 Bell Telephone Laboratories, Incorporated Schottky barrier diode contacts
US4107835A (en) * 1977-02-11 1978-08-22 Bell Telephone Laboratories, Incorporated Fabrication of semiconductive devices
US4141022A (en) * 1977-09-12 1979-02-20 Signetics Corporation Refractory metal contacts for IGFETS
US4263058A (en) * 1979-06-11 1981-04-21 General Electric Company Composite conductive structures in integrated circuits and method of making same
US4283437A (en) * 1979-08-02 1981-08-11 Frito-Lay, Inc. Method for frying foods and fried food products
US4276688A (en) * 1980-01-21 1981-07-07 Rca Corporation Method for forming buried contact complementary MOS devices

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59208773A (ja) * 1983-05-12 1984-11-27 Nec Corp 半導体装置の製造方法
JPS59208772A (ja) * 1983-05-12 1984-11-27 Nec Corp 半導体装置の製造方法
JPS61274325A (ja) * 1985-05-29 1986-12-04 Mitsubishi Electric Corp 半導体装置の製造方法

Also Published As

Publication number Publication date
GB2083949A (en) 1982-03-31
US4339869A (en) 1982-07-20
FR2513011A1 (fr) 1983-03-18
IT1138547B (it) 1986-09-17
DE3135993A1 (de) 1982-04-29
IT8123735A0 (it) 1981-09-02

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