JPS5773975A - Mis type field effect transistor and manufacture thereof - Google Patents

Mis type field effect transistor and manufacture thereof

Info

Publication number
JPS5773975A
JPS5773975A JP55149362A JP14936280A JPS5773975A JP S5773975 A JPS5773975 A JP S5773975A JP 55149362 A JP55149362 A JP 55149362A JP 14936280 A JP14936280 A JP 14936280A JP S5773975 A JPS5773975 A JP S5773975A
Authority
JP
Japan
Prior art keywords
region
source
electrode
gate electrode
drain
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP55149362A
Other languages
Japanese (ja)
Inventor
Masashi Wada
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP55149362A priority Critical patent/JPS5773975A/en
Publication of JPS5773975A publication Critical patent/JPS5773975A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/08—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
    • H01L29/0843—Source or drain regions of field-effect devices
    • H01L29/0847—Source or drain regions of field-effect devices of field-effect transistors with insulated gate

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Non-Volatile Memory (AREA)

Abstract

PURPOSE:To reduce the static capacity between a drain region and a gate electrode by introducing a part of a source region peripheral edge under a gate electrode when forming the source and drain regions in a semiconductor substrate disposed at both sides at the gate electrode but not introducing the peripheral edge of the drain region in nonsymmetric disposition. CONSTITUTION:A gate insulating film 2 is covered on an Si substrate 1, a gate electrode 3 is covered thereon, and ions are injected from a direction having an angle theta with respect to the vertical direction of the substrate 1. Since the surface of the electrode 3 is increased in height t at this time, a source forming region 60 of high impurity density is produced in self-aligning manner at the side near an ion source, and a drain forming region 50 of high density is isolated at a distance L' of tXtantheta at the side farther from the ion source. Thereafter, it is heat treated to introduce the part of the peripheral edge of the region 60 under the electrode 3 to form a source region 6, and the drain region 5 is not superposed with the electrode 3. In this manner, the static capacity of the region 5 side is reduced, thereby obtaining an MISFET having excellent characteristics.
JP55149362A 1980-10-27 1980-10-27 Mis type field effect transistor and manufacture thereof Pending JPS5773975A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP55149362A JPS5773975A (en) 1980-10-27 1980-10-27 Mis type field effect transistor and manufacture thereof

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP55149362A JPS5773975A (en) 1980-10-27 1980-10-27 Mis type field effect transistor and manufacture thereof

Publications (1)

Publication Number Publication Date
JPS5773975A true JPS5773975A (en) 1982-05-08

Family

ID=15473469

Family Applications (1)

Application Number Title Priority Date Filing Date
JP55149362A Pending JPS5773975A (en) 1980-10-27 1980-10-27 Mis type field effect transistor and manufacture thereof

Country Status (1)

Country Link
JP (1) JPS5773975A (en)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62122170A (en) * 1985-11-21 1987-06-03 Nec Corp Mis transistor and manufacture thereof
US4679311A (en) * 1985-12-12 1987-07-14 Allied Corporation Method of fabricating self-aligned field-effect transistor having t-shaped gate electrode, sub-micron gate length and variable drain to gate spacing
US4774200A (en) * 1985-03-26 1988-09-27 Sumitomo Electric Industries, Ltd. Schottky-gate field effect transistor and method for producing the same
US5073514A (en) * 1989-07-18 1991-12-17 Sony Corporation Method of manufacturing mis semiconductor device
US5270226A (en) * 1989-04-03 1993-12-14 Matsushita Electric Industrial Co., Ltd. Manufacturing method for LDDFETS using oblique ion implantion technique

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4774200A (en) * 1985-03-26 1988-09-27 Sumitomo Electric Industries, Ltd. Schottky-gate field effect transistor and method for producing the same
JPS62122170A (en) * 1985-11-21 1987-06-03 Nec Corp Mis transistor and manufacture thereof
US4679311A (en) * 1985-12-12 1987-07-14 Allied Corporation Method of fabricating self-aligned field-effect transistor having t-shaped gate electrode, sub-micron gate length and variable drain to gate spacing
US5270226A (en) * 1989-04-03 1993-12-14 Matsushita Electric Industrial Co., Ltd. Manufacturing method for LDDFETS using oblique ion implantion technique
US5073514A (en) * 1989-07-18 1991-12-17 Sony Corporation Method of manufacturing mis semiconductor device

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