JPS5771600A - Method for measuring semiconductor memory - Google Patents

Method for measuring semiconductor memory

Info

Publication number
JPS5771600A
JPS5771600A JP55147912A JP14791280A JPS5771600A JP S5771600 A JPS5771600 A JP S5771600A JP 55147912 A JP55147912 A JP 55147912A JP 14791280 A JP14791280 A JP 14791280A JP S5771600 A JPS5771600 A JP S5771600A
Authority
JP
Japan
Prior art keywords
information
voltage
nonvolatile
becomes
readout
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP55147912A
Other languages
Japanese (ja)
Inventor
Kaoru Tokushige
Masayoshi Nakane
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP55147912A priority Critical patent/JPS5771600A/en
Priority to US06/311,923 priority patent/US4403306A/en
Priority to DE3141555A priority patent/DE3141555C2/en
Publication of JPS5771600A publication Critical patent/JPS5771600A/en
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C14/00—Digital stores characterised by arrangements of cells having volatile and non-volatile storage properties for back-up when the power is down

Landscapes

  • Techniques For Improving Reliability Of Storages (AREA)
  • For Increasing The Reliability Of Semiconductor Memories (AREA)
  • Static Random-Access Memory (AREA)

Abstract

PURPOSE:To exactly refresh the nonvolatile information, by applying DC voltage to the gate of an MNOS transistor so that a storage holding time of the nonvolatile information can be measured. CONSTITUTION:Information is stored by constituting so that one of N-MNOS transistors TR15, 16 becomes a depression type TR, and the other becomes an enhancement type TR. This information is nonvolatile even if an electric power supply Vcc is turned off. In this state, negative voltage lower than an erase pulse is applied to the gates of the TRs 15, 16 from a pulse voltage signal line MG in order to measure a voltage value by which readout of the nonvolatile information stored at that time becomes impossible. This voltage value has relation of a function to threshold voltage of the depression type TR, and a holding time of information is forecast by a time variation of voltage of the MG line, by which readout of this nonvolatile information becomes impossible.
JP55147912A 1980-10-22 1980-10-22 Method for measuring semiconductor memory Pending JPS5771600A (en)

Priority Applications (3)

Application Number Priority Date Filing Date Title
JP55147912A JPS5771600A (en) 1980-10-22 1980-10-22 Method for measuring semiconductor memory
US06/311,923 US4403306A (en) 1980-10-22 1981-10-16 Semiconductor memory operable as static RAM or EAROM
DE3141555A DE3141555C2 (en) 1980-10-22 1981-10-20 Semiconductor memory

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP55147912A JPS5771600A (en) 1980-10-22 1980-10-22 Method for measuring semiconductor memory

Publications (1)

Publication Number Publication Date
JPS5771600A true JPS5771600A (en) 1982-05-04

Family

ID=15440911

Family Applications (1)

Application Number Title Priority Date Filing Date
JP55147912A Pending JPS5771600A (en) 1980-10-22 1980-10-22 Method for measuring semiconductor memory

Country Status (1)

Country Link
JP (1) JPS5771600A (en)

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