JPS57152595A - Nonvolatile semiconductor memory device - Google Patents
Nonvolatile semiconductor memory deviceInfo
- Publication number
- JPS57152595A JPS57152595A JP3856381A JP3856381A JPS57152595A JP S57152595 A JPS57152595 A JP S57152595A JP 3856381 A JP3856381 A JP 3856381A JP 3856381 A JP3856381 A JP 3856381A JP S57152595 A JPS57152595 A JP S57152595A
- Authority
- JP
- Japan
- Prior art keywords
- electric potential
- source side
- mos type
- memory cell
- source
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
- G11C16/10—Programming or data input circuits
Landscapes
- Semiconductor Memories (AREA)
- Non-Volatile Memory (AREA)
- Read Only Memory (AREA)
Abstract
PURPOSE:To always maintain the source electric potential constantly regardless of the number of writing cells, and to perform stable writings, by installing a means which maintain the source side electric potential of the memory cell at a specific level at the time of data writing. CONSTITUTION:To a nonvolatile semiconductor memory device using MOS type FETs M11-Mmn having a floating structure as memory cells, for example, a source electric potential controlling circuit 40 as shown in the diagram is installed. Then, the source side electric potential VS* of the memory cell is maintained at a level which is close to the electric potential of the source side N2 of an MOS type FET 3 having a structure equal to the memory cell, by impressing a prescribed voltage upon the drain of th MOS type FET 3, by maintaining the gate at a constant electric potential, and by comparing the electric potential appearing at the source side N2 of the MOS type FET 3 with the source side electric potential VS* of the memory.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP3856381A JPS57152595A (en) | 1981-03-17 | 1981-03-17 | Nonvolatile semiconductor memory device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP3856381A JPS57152595A (en) | 1981-03-17 | 1981-03-17 | Nonvolatile semiconductor memory device |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS57152595A true JPS57152595A (en) | 1982-09-20 |
JPS613033B2 JPS613033B2 (en) | 1986-01-29 |
Family
ID=12528763
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP3856381A Granted JPS57152595A (en) | 1981-03-17 | 1981-03-17 | Nonvolatile semiconductor memory device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS57152595A (en) |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6163999A (en) * | 1984-02-21 | 1986-04-02 | ガスト パ−ルゴス | Apparatus for programming eprom and eeprom |
JPS637599A (en) * | 1986-06-26 | 1988-01-13 | Nec Corp | Non-volatile semiconductor memory device |
JPS6326898A (en) * | 1986-06-03 | 1988-02-04 | エスジーエス―トムソン マイクロエレクトロニクス エス.ピー.エイ. | Source bias voltage generator |
-
1981
- 1981-03-17 JP JP3856381A patent/JPS57152595A/en active Granted
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6163999A (en) * | 1984-02-21 | 1986-04-02 | ガスト パ−ルゴス | Apparatus for programming eprom and eeprom |
JPS6326898A (en) * | 1986-06-03 | 1988-02-04 | エスジーエス―トムソン マイクロエレクトロニクス エス.ピー.エイ. | Source bias voltage generator |
JPS637599A (en) * | 1986-06-26 | 1988-01-13 | Nec Corp | Non-volatile semiconductor memory device |
Also Published As
Publication number | Publication date |
---|---|
JPS613033B2 (en) | 1986-01-29 |
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